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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<!--
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MIT License
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Copyright (c) 2021 Digilent, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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-->
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<board schema_version="2.0" vendor="digilentinc.com" name="zybo-z7-20" display_name="Zybo Z7-20" url="https://digilent.com/reference/programmable-logic/zybo-z7/start" preset_file="preset.xml" >
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<compatible_board_revisions>
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<revision id="0">B.2</revision>
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</compatible_board_revisions>
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<file_version>1.1</file_version>
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<description>Zybo Z7-20</description>
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<components>
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<component name="part0" display_name="Zybo Z7-20" type="fpga" part_name="xc7z020clg400-1" pin_map_file="part0_pins.xml" vendor="xilinx" spec_url="https://digilent.com/reference/programmable-logic/zybo-z7/start">
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<interfaces>
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<interface mode="master" name="btns_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="btns_4bits" preset_proc="push_buttons_4bits_preset">
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<port_maps>
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<port_map logical_port="TRI_I" physical_port="btns_4bits_tri_i" dir="in" left="3" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="btns_4bits_tri_i_0"/>
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<pin_map port_index="1" component_pin="btns_4bits_tri_i_1"/>
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<pin_map port_index="2" component_pin="btns_4bits_tri_i_2"/>
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<pin_map port_index="3" component_pin="btns_4bits_tri_i_3"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="leds_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="leds_4bits" preset_proc="led_4bits_preset">
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<port_maps>
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<port_map logical_port="TRI_O" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/>
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<pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/>
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<pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/>
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<pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="ps7_fixedio" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0" of_component="ps7_fixedio" preset_proc="ps7_preset">
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</interface>
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<interface mode="master" name="sws_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="sws_4bits" preset_proc="dip_switches_4bits_preset">
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<port_maps>
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<port_map logical_port="TRI_I" physical_port="sws_4bits_tri_i" dir="in" left="3" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="sws_4bits_tri_i_0"/>
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<pin_map port_index="1" component_pin="sws_4bits_tri_i_1"/>
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<pin_map port_index="2" component_pin="sws_4bits_tri_i_2"/>
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<pin_map port_index="3" component_pin="sws_4bits_tri_i_3"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="slave" name="sys_clock" type="xilinx.com:signal:clock_rtl:1.0" of_component="sys_clock" preset_proc="sys_clock_preset">
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<port_maps>
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<port_map logical_port="CLK" physical_port="sys_clk" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="sys_clk"/>
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</pin_maps>
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</port_map>
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</port_maps>
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<parameters>
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<parameter name="frequency" value="125000000" />
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</parameters>
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</interface>
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<interface mode="slave" name="hdmi_in" type="digilentinc.com:interface:tmds_rtl:1.0" of_component="hdmi_in" preset_proc="hdmi_in_preset">
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<preferred_ips>
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<preferred_ip vendor="digilentinc.com" library="ip" name="dvi2rgb" order="0"/>
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</preferred_ips>
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<port_maps>
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<port_map logical_port="CLK_P" physical_port="TMDS_IN_clk_p" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_IN_clk_p"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="CLK_N" physical_port="TMDS_IN_clk_n" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_IN_clk_n"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="DATA_P" physical_port="TMDS_IN_D_P" dir="in" left="2" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_IN_data_p_0"/>
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<pin_map port_index="1" component_pin="TMDS_IN_data_p_1"/>
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<pin_map port_index="2" component_pin="TMDS_IN_data_p_2"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="DATA_N" physical_port="TMDS_IN_D_N" dir="in" left="2" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_IN_data_n_0"/>
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<pin_map port_index="1" component_pin="TMDS_IN_data_n_1"/>
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<pin_map port_index="2" component_pin="TMDS_IN_data_n_2"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="hdmi_in_ddc" type="xilinx.com:interface:iic_rtl:1.0" of_component="hdmi_in" preset_proc="hdmi_in_preset">
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<description>HDMI DDC</description>
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<preferred_ips>
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<preferred_ip vendor="digilentinc.com" library="ip" name="dvi2rgb" order="0"/>
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</preferred_ips>
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<port_maps>
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<port_map logical_port="SDA_I" physical_port="hdmi_in_ddc_sda" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_sda"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="SDA_O" physical_port="hdmi_in_ddc_sda" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_sda"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="SDA_T" physical_port="hdmi_in_ddc_sda" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_sda"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_I" physical_port="hdmi_in_ddc_scl" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_scl"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_O" physical_port="hdmi_in_ddc_scl" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_scl"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="SCL_T" physical_port="hdmi_in_ddc_scl" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_in_ddc_scl"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="hdmi_in_hpd_led" type="xilinx.com:interface:gpio_rtl:1.0" of_component="hdmi_in_hpd_led" preset_proc="output_1bit_preset">
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<port_maps>
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<port_map logical_port="TRI_O" physical_port="hdmi_rx_hpd" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_rx_hpd"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="TRI_I" physical_port="hdmi_rx_hpd" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_rx_hpd"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="TRI_T" physical_port="hdmi_rx_hpd" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_rx_hpd"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="hdmi_out" type="digilentinc.com:interface:tmds_rtl:1.0" of_component="hdmi_out">
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<description>HDMI Out</description>
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<preferred_ips>
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<preferred_ip vendor="digilentinc.com" library="ip" name="rgb2dvi" order="0"/>
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</preferred_ips>
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<port_maps>
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<port_map logical_port="CLK_P" physical_port="TMDS_OUT_clk_p" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_OUT_clk_p"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="CLK_N" physical_port="TMDS_OUT_clk_n" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_OUT_clk_n"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="DATA_P" physical_port="TMDS_OUT_D_P" dir="out" left="2" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_OUT_data_p_0"/>
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<pin_map port_index="1" component_pin="TMDS_OUT_data_p_1"/>
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<pin_map port_index="2" component_pin="TMDS_OUT_data_p_2"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="DATA_N" physical_port="TMDS_OUT_D_N" dir="out" left="2" right="0">
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<pin_maps>
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<pin_map port_index="0" component_pin="TMDS_OUT_data_n_0"/>
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<pin_map port_index="1" component_pin="TMDS_OUT_data_n_1"/>
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<pin_map port_index="2" component_pin="TMDS_OUT_data_n_2"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="hdmi_out_hpd_led" type="xilinx.com:interface:gpio_rtl:1.0" of_component="hdmi_out_hpd_led" preset_proc="output_1bit_preset">
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<port_maps>
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<port_map logical_port="TRI_O" physical_port="hdmi_tx_hpd" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="TRI_I" physical_port="hdmi_tx_hpd" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="TRI_T" physical_port="hdmi_tx_hpd" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
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</pin_maps>
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</port_map>
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</port_maps>
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</interface>
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<interface mode="master" name="ja" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="ja">
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<port_maps>
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<port_map logical_port="PIN1_I" physical_port="JA1" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA1"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN1_O" physical_port="JA1" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA1"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN1_T" physical_port="JA1" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA1"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN2_I" physical_port="JA2" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA2"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN2_O" physical_port="JA2" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA2"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN2_T" physical_port="JA2" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA2"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN3_I" physical_port="JA3" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA3"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN3_O" physical_port="JA3" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA3"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN3_T" physical_port="JA3" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA3"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN4_I" physical_port="JA4" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA4"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN4_O" physical_port="JA4" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA4"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN4_T" physical_port="JA4" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA4"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN7_I" physical_port="JA7" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA7"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN7_O" physical_port="JA7" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA7"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN7_T" physical_port="JA7" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA7"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN8_I" physical_port="JA8" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA8"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN8_O" physical_port="JA8" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA8"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN8_T" physical_port="JA8" dir="out">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA8"/>
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN9_I" physical_port="JA9" dir="in">
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<pin_maps>
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<pin_map port_index="0" component_pin="JA9"/>
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320
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</pin_maps>
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</port_map>
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<port_map logical_port="PIN9_O" physical_port="JA9" dir="out">
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<pin_maps>
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324
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<pin_map port_index="0" component_pin="JA9"/>
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325
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</pin_maps>
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</port_map>
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327
|
<port_map logical_port="PIN9_T" physical_port="JA9" dir="out">
|
328
|
<pin_maps>
|
329
|
<pin_map port_index="0" component_pin="JA9"/>
|
330
|
</pin_maps>
|
331
|
</port_map>
|
332
|
<port_map logical_port="PIN10_I" physical_port="JA10" dir="in">
|
333
|
<pin_maps>
|
334
|
<pin_map port_index="0" component_pin="JA10"/>
|
335
|
</pin_maps>
|
336
|
</port_map>
|
337
|
<port_map logical_port="PIN10_O" physical_port="JA10" dir="out">
|
338
|
<pin_maps>
|
339
|
<pin_map port_index="0" component_pin="JA10"/>
|
340
|
</pin_maps>
|
341
|
</port_map>
|
342
|
<port_map logical_port="PIN10_T" physical_port="JA10" dir="out">
|
343
|
<pin_maps>
|
344
|
<pin_map port_index="0" component_pin="JA10"/>
|
345
|
</pin_maps>
|
346
|
</port_map>
|
347
|
</port_maps>
|
348
|
</interface>
|
349
|
<interface mode="master" name="jb" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="jb">
|
350
|
<port_maps>
|
351
|
<port_map logical_port="PIN1_I" physical_port="JB1" dir="in">
|
352
|
<pin_maps>
|
353
|
<pin_map port_index="0" component_pin="JB1"/>
|
354
|
</pin_maps>
|
355
|
</port_map>
|
356
|
<port_map logical_port="PIN1_O" physical_port="JB1" dir="out">
|
357
|
<pin_maps>
|
358
|
<pin_map port_index="0" component_pin="JB1"/>
|
359
|
</pin_maps>
|
360
|
</port_map>
|
361
|
<port_map logical_port="PIN1_T" physical_port="JB1" dir="out">
|
362
|
<pin_maps>
|
363
|
<pin_map port_index="0" component_pin="JB1"/>
|
364
|
</pin_maps>
|
365
|
</port_map>
|
366
|
<port_map logical_port="PIN2_I" physical_port="JB2" dir="in">
|
367
|
<pin_maps>
|
368
|
<pin_map port_index="0" component_pin="JB2"/>
|
369
|
</pin_maps>
|
370
|
</port_map>
|
371
|
<port_map logical_port="PIN2_O" physical_port="JB2" dir="out">
|
372
|
<pin_maps>
|
373
|
<pin_map port_index="0" component_pin="JB2"/>
|
374
|
</pin_maps>
|
375
|
</port_map>
|
376
|
<port_map logical_port="PIN2_T" physical_port="JB2" dir="out">
|
377
|
<pin_maps>
|
378
|
<pin_map port_index="0" component_pin="JB2"/>
|
379
|
</pin_maps>
|
380
|
</port_map>
|
381
|
<port_map logical_port="PIN3_I" physical_port="JB3" dir="in">
|
382
|
<pin_maps>
|
383
|
<pin_map port_index="0" component_pin="JB3"/>
|
384
|
</pin_maps>
|
385
|
</port_map>
|
386
|
<port_map logical_port="PIN3_O" physical_port="JB3" dir="out">
|
387
|
<pin_maps>
|
388
|
<pin_map port_index="0" component_pin="JB3"/>
|
389
|
</pin_maps>
|
390
|
</port_map>
|
391
|
<port_map logical_port="PIN3_T" physical_port="JB3" dir="out">
|
392
|
<pin_maps>
|
393
|
<pin_map port_index="0" component_pin="JB3"/>
|
394
|
</pin_maps>
|
395
|
</port_map>
|
396
|
<port_map logical_port="PIN4_I" physical_port="JB4" dir="in">
|
397
|
<pin_maps>
|
398
|
<pin_map port_index="0" component_pin="JB4"/>
|
399
|
</pin_maps>
|
400
|
</port_map>
|
401
|
<port_map logical_port="PIN4_O" physical_port="JB4" dir="out">
|
402
|
<pin_maps>
|
403
|
<pin_map port_index="0" component_pin="JB4"/>
|
404
|
</pin_maps>
|
405
|
</port_map>
|
406
|
<port_map logical_port="PIN4_T" physical_port="JB4" dir="out">
|
407
|
<pin_maps>
|
408
|
<pin_map port_index="0" component_pin="JB4"/>
|
409
|
</pin_maps>
|
410
|
</port_map>
|
411
|
<port_map logical_port="PIN7_I" physical_port="JB7" dir="in">
|
412
|
<pin_maps>
|
413
|
<pin_map port_index="0" component_pin="JB7"/>
|
414
|
</pin_maps>
|
415
|
</port_map>
|
416
|
<port_map logical_port="PIN7_O" physical_port="JB7" dir="out">
|
417
|
<pin_maps>
|
418
|
<pin_map port_index="0" component_pin="JB7"/>
|
419
|
</pin_maps>
|
420
|
</port_map>
|
421
|
<port_map logical_port="PIN7_T" physical_port="JB7" dir="out">
|
422
|
<pin_maps>
|
423
|
<pin_map port_index="0" component_pin="JB7"/>
|
424
|
</pin_maps>
|
425
|
</port_map>
|
426
|
<port_map logical_port="PIN8_I" physical_port="JB8" dir="in">
|
427
|
<pin_maps>
|
428
|
<pin_map port_index="0" component_pin="JB8"/>
|
429
|
</pin_maps>
|
430
|
</port_map>
|
431
|
<port_map logical_port="PIN8_O" physical_port="JB8" dir="out">
|
432
|
<pin_maps>
|
433
|
<pin_map port_index="0" component_pin="JB8"/>
|
434
|
</pin_maps>
|
435
|
</port_map>
|
436
|
<port_map logical_port="PIN8_T" physical_port="JB8" dir="out">
|
437
|
<pin_maps>
|
438
|
<pin_map port_index="0" component_pin="JB8"/>
|
439
|
</pin_maps>
|
440
|
</port_map>
|
441
|
<port_map logical_port="PIN9_I" physical_port="JB9" dir="in">
|
442
|
<pin_maps>
|
443
|
<pin_map port_index="0" component_pin="JB9"/>
|
444
|
</pin_maps>
|
445
|
</port_map>
|
446
|
<port_map logical_port="PIN9_O" physical_port="JB9" dir="out">
|
447
|
<pin_maps>
|
448
|
<pin_map port_index="0" component_pin="JB9"/>
|
449
|
</pin_maps>
|
450
|
</port_map>
|
451
|
<port_map logical_port="PIN9_T" physical_port="JB9" dir="out">
|
452
|
<pin_maps>
|
453
|
<pin_map port_index="0" component_pin="JB9"/>
|
454
|
</pin_maps>
|
455
|
</port_map>
|
456
|
<port_map logical_port="PIN10_I" physical_port="JB10" dir="in">
|
457
|
<pin_maps>
|
458
|
<pin_map port_index="0" component_pin="JB10"/>
|
459
|
</pin_maps>
|
460
|
</port_map>
|
461
|
<port_map logical_port="PIN10_O" physical_port="JB10" dir="out">
|
462
|
<pin_maps>
|
463
|
<pin_map port_index="0" component_pin="JB10"/>
|
464
|
</pin_maps>
|
465
|
</port_map>
|
466
|
<port_map logical_port="PIN10_T" physical_port="JB10" dir="out">
|
467
|
<pin_maps>
|
468
|
<pin_map port_index="0" component_pin="JB10"/>
|
469
|
</pin_maps>
|
470
|
</port_map>
|
471
|
</port_maps>
|
472
|
</interface>
|
473
|
<interface mode="master" name="jc" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="jc">
|
474
|
<port_maps>
|
475
|
<port_map logical_port="PIN1_I" physical_port="JC1" dir="in">
|
476
|
<pin_maps>
|
477
|
<pin_map port_index="0" component_pin="JC1"/>
|
478
|
</pin_maps>
|
479
|
</port_map>
|
480
|
<port_map logical_port="PIN1_O" physical_port="JC1" dir="out">
|
481
|
<pin_maps>
|
482
|
<pin_map port_index="0" component_pin="JC1"/>
|
483
|
</pin_maps>
|
484
|
</port_map>
|
485
|
<port_map logical_port="PIN1_T" physical_port="JC1" dir="out">
|
486
|
<pin_maps>
|
487
|
<pin_map port_index="0" component_pin="JC1"/>
|
488
|
</pin_maps>
|
489
|
</port_map>
|
490
|
<port_map logical_port="PIN2_I" physical_port="JC2" dir="in">
|
491
|
<pin_maps>
|
492
|
<pin_map port_index="0" component_pin="JC2"/>
|
493
|
</pin_maps>
|
494
|
</port_map>
|
495
|
<port_map logical_port="PIN2_O" physical_port="JC2" dir="out">
|
496
|
<pin_maps>
|
497
|
<pin_map port_index="0" component_pin="JC2"/>
|
498
|
</pin_maps>
|
499
|
</port_map>
|
500
|
<port_map logical_port="PIN2_T" physical_port="JC2" dir="out">
|
501
|
<pin_maps>
|
502
|
<pin_map port_index="0" component_pin="JC2"/>
|
503
|
</pin_maps>
|
504
|
</port_map>
|
505
|
<port_map logical_port="PIN3_I" physical_port="JC3" dir="in">
|
506
|
<pin_maps>
|
507
|
<pin_map port_index="0" component_pin="JC3"/>
|
508
|
</pin_maps>
|
509
|
</port_map>
|
510
|
<port_map logical_port="PIN3_O" physical_port="JC3" dir="out">
|
511
|
<pin_maps>
|
512
|
<pin_map port_index="0" component_pin="JC3"/>
|
513
|
</pin_maps>
|
514
|
</port_map>
|
515
|
<port_map logical_port="PIN3_T" physical_port="JC3" dir="out">
|
516
|
<pin_maps>
|
517
|
<pin_map port_index="0" component_pin="JC3"/>
|
518
|
</pin_maps>
|
519
|
</port_map>
|
520
|
<port_map logical_port="PIN4_I" physical_port="JC4" dir="in">
|
521
|
<pin_maps>
|
522
|
<pin_map port_index="0" component_pin="JC4"/>
|
523
|
</pin_maps>
|
524
|
</port_map>
|
525
|
<port_map logical_port="PIN4_O" physical_port="JC4" dir="out">
|
526
|
<pin_maps>
|
527
|
<pin_map port_index="0" component_pin="JC4"/>
|
528
|
</pin_maps>
|
529
|
</port_map>
|
530
|
<port_map logical_port="PIN4_T" physical_port="JC4" dir="out">
|
531
|
<pin_maps>
|
532
|
<pin_map port_index="0" component_pin="JC4"/>
|
533
|
</pin_maps>
|
534
|
</port_map>
|
535
|
<port_map logical_port="PIN7_I" physical_port="JC7" dir="in">
|
536
|
<pin_maps>
|
537
|
<pin_map port_index="0" component_pin="JC7"/>
|
538
|
</pin_maps>
|
539
|
</port_map>
|
540
|
<port_map logical_port="PIN7_O" physical_port="JC7" dir="out">
|
541
|
<pin_maps>
|
542
|
<pin_map port_index="0" component_pin="JC7"/>
|
543
|
</pin_maps>
|
544
|
</port_map>
|
545
|
<port_map logical_port="PIN7_T" physical_port="JC7" dir="out">
|
546
|
<pin_maps>
|
547
|
<pin_map port_index="0" component_pin="JC7"/>
|
548
|
</pin_maps>
|
549
|
</port_map>
|
550
|
<port_map logical_port="PIN8_I" physical_port="JC8" dir="in">
|
551
|
<pin_maps>
|
552
|
<pin_map port_index="0" component_pin="JC8"/>
|
553
|
</pin_maps>
|
554
|
</port_map>
|
555
|
<port_map logical_port="PIN8_O" physical_port="JC8" dir="out">
|
556
|
<pin_maps>
|
557
|
<pin_map port_index="0" component_pin="JC8"/>
|
558
|
</pin_maps>
|
559
|
</port_map>
|
560
|
<port_map logical_port="PIN8_T" physical_port="JC8" dir="out">
|
561
|
<pin_maps>
|
562
|
<pin_map port_index="0" component_pin="JC8"/>
|
563
|
</pin_maps>
|
564
|
</port_map>
|
565
|
<port_map logical_port="PIN9_I" physical_port="JC9" dir="in">
|
566
|
<pin_maps>
|
567
|
<pin_map port_index="0" component_pin="JC9"/>
|
568
|
</pin_maps>
|
569
|
</port_map>
|
570
|
<port_map logical_port="PIN9_O" physical_port="JC9" dir="out">
|
571
|
<pin_maps>
|
572
|
<pin_map port_index="0" component_pin="JC9"/>
|
573
|
</pin_maps>
|
574
|
</port_map>
|
575
|
<port_map logical_port="PIN9_T" physical_port="JC9" dir="out">
|
576
|
<pin_maps>
|
577
|
<pin_map port_index="0" component_pin="JC9"/>
|
578
|
</pin_maps>
|
579
|
</port_map>
|
580
|
<port_map logical_port="PIN10_I" physical_port="JC10" dir="in">
|
581
|
<pin_maps>
|
582
|
<pin_map port_index="0" component_pin="JC10"/>
|
583
|
</pin_maps>
|
584
|
</port_map>
|
585
|
<port_map logical_port="PIN10_O" physical_port="JC10" dir="out">
|
586
|
<pin_maps>
|
587
|
<pin_map port_index="0" component_pin="JC10"/>
|
588
|
</pin_maps>
|
589
|
</port_map>
|
590
|
<port_map logical_port="PIN10_T" physical_port="JC10" dir="out">
|
591
|
<pin_maps>
|
592
|
<pin_map port_index="0" component_pin="JC10"/>
|
593
|
</pin_maps>
|
594
|
</port_map>
|
595
|
</port_maps>
|
596
|
</interface>
|
597
|
<interface mode="master" name="jd" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="jd">
|
598
|
<port_maps>
|
599
|
<port_map logical_port="PIN1_I" physical_port="JD1" dir="in">
|
600
|
<pin_maps>
|
601
|
<pin_map port_index="0" component_pin="JD1"/>
|
602
|
</pin_maps>
|
603
|
</port_map>
|
604
|
<port_map logical_port="PIN1_O" physical_port="JD1" dir="out">
|
605
|
<pin_maps>
|
606
|
<pin_map port_index="0" component_pin="JD1"/>
|
607
|
</pin_maps>
|
608
|
</port_map>
|
609
|
<port_map logical_port="PIN1_T" physical_port="JD1" dir="out">
|
610
|
<pin_maps>
|
611
|
<pin_map port_index="0" component_pin="JD1"/>
|
612
|
</pin_maps>
|
613
|
</port_map>
|
614
|
<port_map logical_port="PIN2_I" physical_port="JD2" dir="in">
|
615
|
<pin_maps>
|
616
|
<pin_map port_index="0" component_pin="JD2"/>
|
617
|
</pin_maps>
|
618
|
</port_map>
|
619
|
<port_map logical_port="PIN2_O" physical_port="JD2" dir="out">
|
620
|
<pin_maps>
|
621
|
<pin_map port_index="0" component_pin="JD2"/>
|
622
|
</pin_maps>
|
623
|
</port_map>
|
624
|
<port_map logical_port="PIN2_T" physical_port="JD2" dir="out">
|
625
|
<pin_maps>
|
626
|
<pin_map port_index="0" component_pin="JD2"/>
|
627
|
</pin_maps>
|
628
|
</port_map>
|
629
|
<port_map logical_port="PIN3_I" physical_port="JD3" dir="in">
|
630
|
<pin_maps>
|
631
|
<pin_map port_index="0" component_pin="JD3"/>
|
632
|
</pin_maps>
|
633
|
</port_map>
|
634
|
<port_map logical_port="PIN3_O" physical_port="JD3" dir="out">
|
635
|
<pin_maps>
|
636
|
<pin_map port_index="0" component_pin="JD3"/>
|
637
|
</pin_maps>
|
638
|
</port_map>
|
639
|
<port_map logical_port="PIN3_T" physical_port="JD3" dir="out">
|
640
|
<pin_maps>
|
641
|
<pin_map port_index="0" component_pin="JD3"/>
|
642
|
</pin_maps>
|
643
|
</port_map>
|
644
|
<port_map logical_port="PIN4_I" physical_port="JD4" dir="in">
|
645
|
<pin_maps>
|
646
|
<pin_map port_index="0" component_pin="JD4"/>
|
647
|
</pin_maps>
|
648
|
</port_map>
|
649
|
<port_map logical_port="PIN4_O" physical_port="JD4" dir="out">
|
650
|
<pin_maps>
|
651
|
<pin_map port_index="0" component_pin="JD4"/>
|
652
|
</pin_maps>
|
653
|
</port_map>
|
654
|
<port_map logical_port="PIN4_T" physical_port="JD4" dir="out">
|
655
|
<pin_maps>
|
656
|
<pin_map port_index="0" component_pin="JD4"/>
|
657
|
</pin_maps>
|
658
|
</port_map>
|
659
|
<port_map logical_port="PIN7_I" physical_port="JD7" dir="in">
|
660
|
<pin_maps>
|
661
|
<pin_map port_index="0" component_pin="JD7"/>
|
662
|
</pin_maps>
|
663
|
</port_map>
|
664
|
<port_map logical_port="PIN7_O" physical_port="JD7" dir="out">
|
665
|
<pin_maps>
|
666
|
<pin_map port_index="0" component_pin="JD7"/>
|
667
|
</pin_maps>
|
668
|
</port_map>
|
669
|
<port_map logical_port="PIN7_T" physical_port="JD7" dir="out">
|
670
|
<pin_maps>
|
671
|
<pin_map port_index="0" component_pin="JD7"/>
|
672
|
</pin_maps>
|
673
|
</port_map>
|
674
|
<port_map logical_port="PIN8_I" physical_port="JD8" dir="in">
|
675
|
<pin_maps>
|
676
|
<pin_map port_index="0" component_pin="JD8"/>
|
677
|
</pin_maps>
|
678
|
</port_map>
|
679
|
<port_map logical_port="PIN8_O" physical_port="JD8" dir="out">
|
680
|
<pin_maps>
|
681
|
<pin_map port_index="0" component_pin="JD8"/>
|
682
|
</pin_maps>
|
683
|
</port_map>
|
684
|
<port_map logical_port="PIN8_T" physical_port="JD8" dir="out">
|
685
|
<pin_maps>
|
686
|
<pin_map port_index="0" component_pin="JD8"/>
|
687
|
</pin_maps>
|
688
|
</port_map>
|
689
|
<port_map logical_port="PIN9_I" physical_port="JD9" dir="in">
|
690
|
<pin_maps>
|
691
|
<pin_map port_index="0" component_pin="JD9"/>
|
692
|
</pin_maps>
|
693
|
</port_map>
|
694
|
<port_map logical_port="PIN9_O" physical_port="JD9" dir="out">
|
695
|
<pin_maps>
|
696
|
<pin_map port_index="0" component_pin="JD9"/>
|
697
|
</pin_maps>
|
698
|
</port_map>
|
699
|
<port_map logical_port="PIN9_T" physical_port="JD9" dir="out">
|
700
|
<pin_maps>
|
701
|
<pin_map port_index="0" component_pin="JD9"/>
|
702
|
</pin_maps>
|
703
|
</port_map>
|
704
|
<port_map logical_port="PIN10_I" physical_port="JD10" dir="in">
|
705
|
<pin_maps>
|
706
|
<pin_map port_index="0" component_pin="JD10"/>
|
707
|
</pin_maps>
|
708
|
</port_map>
|
709
|
<port_map logical_port="PIN10_O" physical_port="JD10" dir="out">
|
710
|
<pin_maps>
|
711
|
<pin_map port_index="0" component_pin="JD10"/>
|
712
|
</pin_maps>
|
713
|
</port_map>
|
714
|
<port_map logical_port="PIN10_T" physical_port="JD10" dir="out">
|
715
|
<pin_maps>
|
716
|
<pin_map port_index="0" component_pin="JD10"/>
|
717
|
</pin_maps>
|
718
|
</port_map>
|
719
|
</port_maps>
|
720
|
</interface>
|
721
|
<interface mode="master" name="je" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="je">
|
722
|
<port_maps>
|
723
|
<port_map logical_port="PIN1_I" physical_port="JE1" dir="in">
|
724
|
<pin_maps>
|
725
|
<pin_map port_index="0" component_pin="JE1"/>
|
726
|
</pin_maps>
|
727
|
</port_map>
|
728
|
<port_map logical_port="PIN1_O" physical_port="JE1" dir="out">
|
729
|
<pin_maps>
|
730
|
<pin_map port_index="0" component_pin="JE1"/>
|
731
|
</pin_maps>
|
732
|
</port_map>
|
733
|
<port_map logical_port="PIN1_T" physical_port="JE1" dir="out">
|
734
|
<pin_maps>
|
735
|
<pin_map port_index="0" component_pin="JE1"/>
|
736
|
</pin_maps>
|
737
|
</port_map>
|
738
|
<port_map logical_port="PIN2_I" physical_port="JE2" dir="in">
|
739
|
<pin_maps>
|
740
|
<pin_map port_index="0" component_pin="JE2"/>
|
741
|
</pin_maps>
|
742
|
</port_map>
|
743
|
<port_map logical_port="PIN2_O" physical_port="JE2" dir="out">
|
744
|
<pin_maps>
|
745
|
<pin_map port_index="0" component_pin="JE2"/>
|
746
|
</pin_maps>
|
747
|
</port_map>
|
748
|
<port_map logical_port="PIN2_T" physical_port="JE2" dir="out">
|
749
|
<pin_maps>
|
750
|
<pin_map port_index="0" component_pin="JE2"/>
|
751
|
</pin_maps>
|
752
|
</port_map>
|
753
|
<port_map logical_port="PIN3_I" physical_port="JE3" dir="in">
|
754
|
<pin_maps>
|
755
|
<pin_map port_index="0" component_pin="JE3"/>
|
756
|
</pin_maps>
|
757
|
</port_map>
|
758
|
<port_map logical_port="PIN3_O" physical_port="JE3" dir="out">
|
759
|
<pin_maps>
|
760
|
<pin_map port_index="0" component_pin="JE3"/>
|
761
|
</pin_maps>
|
762
|
</port_map>
|
763
|
<port_map logical_port="PIN3_T" physical_port="JE3" dir="out">
|
764
|
<pin_maps>
|
765
|
<pin_map port_index="0" component_pin="JE3"/>
|
766
|
</pin_maps>
|
767
|
</port_map>
|
768
|
<port_map logical_port="PIN4_I" physical_port="JE4" dir="in">
|
769
|
<pin_maps>
|
770
|
<pin_map port_index="0" component_pin="JE4"/>
|
771
|
</pin_maps>
|
772
|
</port_map>
|
773
|
<port_map logical_port="PIN4_O" physical_port="JE4" dir="out">
|
774
|
<pin_maps>
|
775
|
<pin_map port_index="0" component_pin="JE4"/>
|
776
|
</pin_maps>
|
777
|
</port_map>
|
778
|
<port_map logical_port="PIN4_T" physical_port="JE4" dir="out">
|
779
|
<pin_maps>
|
780
|
<pin_map port_index="0" component_pin="JE4"/>
|
781
|
</pin_maps>
|
782
|
</port_map>
|
783
|
<port_map logical_port="PIN7_I" physical_port="JE7" dir="in">
|
784
|
<pin_maps>
|
785
|
<pin_map port_index="0" component_pin="JE7"/>
|
786
|
</pin_maps>
|
787
|
</port_map>
|
788
|
<port_map logical_port="PIN7_O" physical_port="JE7" dir="out">
|
789
|
<pin_maps>
|
790
|
<pin_map port_index="0" component_pin="JE7"/>
|
791
|
</pin_maps>
|
792
|
</port_map>
|
793
|
<port_map logical_port="PIN7_T" physical_port="JE7" dir="out">
|
794
|
<pin_maps>
|
795
|
<pin_map port_index="0" component_pin="JE7"/>
|
796
|
</pin_maps>
|
797
|
</port_map>
|
798
|
<port_map logical_port="PIN8_I" physical_port="JE8" dir="in">
|
799
|
<pin_maps>
|
800
|
<pin_map port_index="0" component_pin="JE8"/>
|
801
|
</pin_maps>
|
802
|
</port_map>
|
803
|
<port_map logical_port="PIN8_O" physical_port="JE8" dir="out">
|
804
|
<pin_maps>
|
805
|
<pin_map port_index="0" component_pin="JE8"/>
|
806
|
</pin_maps>
|
807
|
</port_map>
|
808
|
<port_map logical_port="PIN8_T" physical_port="JE8" dir="out">
|
809
|
<pin_maps>
|
810
|
<pin_map port_index="0" component_pin="JE8"/>
|
811
|
</pin_maps>
|
812
|
</port_map>
|
813
|
<port_map logical_port="PIN9_I" physical_port="JE9" dir="in">
|
814
|
<pin_maps>
|
815
|
<pin_map port_index="0" component_pin="JE9"/>
|
816
|
</pin_maps>
|
817
|
</port_map>
|
818
|
<port_map logical_port="PIN9_O" physical_port="JE9" dir="out">
|
819
|
<pin_maps>
|
820
|
<pin_map port_index="0" component_pin="JE9"/>
|
821
|
</pin_maps>
|
822
|
</port_map>
|
823
|
<port_map logical_port="PIN9_T" physical_port="JE9" dir="out">
|
824
|
<pin_maps>
|
825
|
<pin_map port_index="0" component_pin="JE9"/>
|
826
|
</pin_maps>
|
827
|
</port_map>
|
828
|
<port_map logical_port="PIN10_I" physical_port="JE10" dir="in">
|
829
|
<pin_maps>
|
830
|
<pin_map port_index="0" component_pin="JE10"/>
|
831
|
</pin_maps>
|
832
|
</port_map>
|
833
|
<port_map logical_port="PIN10_O" physical_port="JE10" dir="out">
|
834
|
<pin_maps>
|
835
|
<pin_map port_index="0" component_pin="JE10"/>
|
836
|
</pin_maps>
|
837
|
</port_map>
|
838
|
<port_map logical_port="PIN10_T" physical_port="JE10" dir="out">
|
839
|
<pin_maps>
|
840
|
<pin_map port_index="0" component_pin="JE10"/>
|
841
|
</pin_maps>
|
842
|
</port_map>
|
843
|
</port_maps>
|
844
|
</interface>
|
845
|
<interface mode="master" name="rgb_led" type="xilinx.com:interface:gpio_rtl:1.0" of_component="rgb_led" preset_proc="rgb_led_preset">
|
846
|
<description>2 RGB LEDs</description>
|
847
|
<preferred_ips>
|
848
|
<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
|
849
|
</preferred_ips>
|
850
|
<port_maps>
|
851
|
<port_map logical_port="TRI_O" physical_port="rgb_led_tri_o" dir="out" left="5" right="0">
|
852
|
<pin_maps>
|
853
|
<pin_map port_index="0" component_pin="rgb_led_tri_o_0"/>
|
854
|
<pin_map port_index="1" component_pin="rgb_led_tri_o_1"/>
|
855
|
<pin_map port_index="2" component_pin="rgb_led_tri_o_2"/>
|
856
|
<pin_map port_index="3" component_pin="rgb_led_tri_o_3"/>
|
857
|
<pin_map port_index="4" component_pin="rgb_led_tri_o_4"/>
|
858
|
<pin_map port_index="5" component_pin="rgb_led_tri_o_5"/>
|
859
|
</pin_maps>
|
860
|
</port_map>
|
861
|
</port_maps>
|
862
|
</interface>
|
863
|
</interfaces>
|
864
|
</component>
|
865
|
|
866
|
<component name="btns_4bits" display_name="4 Buttons" type="chip" sub_type="push_button" major_group="GPIO">
|
867
|
<description>Buttons 3 to 0</description>
|
868
|
</component>
|
869
|
<component name="ja" display_name="Connector JA" type="chip" sub_type="chip" major_group="Pmod">
|
870
|
<description>Pmod Connector JA</description>
|
871
|
</component>
|
872
|
<component name="jb" display_name="Connector JB" type="chip" sub_type="chip" major_group="Pmod">
|
873
|
<description>Pmod Connector JB</description>
|
874
|
</component>
|
875
|
<component name="jc" display_name="Connector JC" type="chip" sub_type="chip" major_group="Pmod">
|
876
|
<description>Pmod Connector JC</description>
|
877
|
</component>
|
878
|
<component name="jd" display_name="Connector JD" type="chip" sub_type="chip" major_group="Pmod">
|
879
|
<description>Pmod Connector JD</description>
|
880
|
</component>
|
881
|
<component name="je" display_name="Connector JE" type="chip" sub_type="chip" major_group="Pmod">
|
882
|
<description>Pmod Connector JE</description>
|
883
|
</component>
|
884
|
<component name="leds_4bits" display_name="4 LEDs" type="chip" sub_type="led" major_group="GPIO">
|
885
|
<description>LEDs 3 to 0</description>
|
886
|
</component>
|
887
|
<component name="ps7_fixedio" display_name="ps7_fixedio" type="chip" sub_type="fixed_io" major_group=""/>
|
888
|
<component name="sws_4bits" display_name="4 Switches" type="chip" sub_type="switch" major_group="GPIO">
|
889
|
<description>DIP Switches 3 to 0</description>
|
890
|
</component>
|
891
|
<component name="sys_clock" display_name="System Clock" type="chip" sub_type="system_clock" major_group="Clocks">
|
892
|
<description>3.3V Single-Ended 50 MHz oscillator used as system clock on the board</description>
|
893
|
</component>
|
894
|
<component name="rgb_led" display_name="2 RGB LEDS" type="chip" sub_type="led" major_group="GPIO">
|
895
|
<description>RGB leds 5 to 0 (3 per LED, Ordered "RGBRGB")</description>
|
896
|
</component>
|
897
|
|
898
|
<component name="hdmi_in" display_name="HDMI In" type="chip" sub_type="fixed_io" major_group="HDMI">
|
899
|
<description>HDMI input (Requires Digilent's TMDS interface)</description>
|
900
|
<component_modes>
|
901
|
<component_mode name="HDMI_IN" display_name="HDMI In">
|
902
|
<interfaces>
|
903
|
<interface name="hdmi_in" order="0"/>
|
904
|
<interface name="hdmi_in_ddc" order="1"/>
|
905
|
</interfaces>
|
906
|
</component_mode>
|
907
|
</component_modes>
|
908
|
</component>
|
909
|
<component name="hdmi_in_hpd_led" display_name="HDMI In HPD" type="chip" sub_type="led" major_group="HDMI">
|
910
|
<description>HDMI in HPD (Connected to LD8)</description>
|
911
|
</component>
|
912
|
<component name="hdmi_out" display_name="HDMI out" type="chip" sub_type="fixed_io" major_group="HDMI">
|
913
|
<description>HDMI Out (Requires Digilent's TMDS interface)</description>
|
914
|
</component>
|
915
|
<component name="hdmi_out_hpd_led" display_name="HDMI out HPD" type="chip" sub_type="led" major_group="HDMI">
|
916
|
<description>HDMI out HPD</description>
|
917
|
</component>
|
918
|
|
919
|
|
920
|
|
921
|
|
922
|
</components>
|
923
|
<jtag_chains>
|
924
|
<jtag_chain name="chain1">
|
925
|
<position name="0" component="part0"/>
|
926
|
</jtag_chain>
|
927
|
</jtag_chains>
|
928
|
<connections>
|
929
|
<connection name="part0_btns_4bits" component1="part0" component2="btns_4bits">
|
930
|
<connection_map name="part0_btns_4bits_1" c1_st_index="0" c1_end_index="3" c2_st_index="0" c2_end_index="3"/>
|
931
|
</connection>
|
932
|
<connection name="part0_leds_4bits" component1="part0" component2="leds_4bits">
|
933
|
<connection_map name="part0_leds_4bits_1" c1_st_index="4" c1_end_index="7" c2_st_index="0" c2_end_index="3"/>
|
934
|
</connection>
|
935
|
<connection name="part0_sws_4bits" component1="part0" component2="sws_4bits">
|
936
|
<connection_map name="part0_sws_4bits_1" c1_st_index="8" c1_end_index="11" c2_st_index="0" c2_end_index="3"/>
|
937
|
</connection>
|
938
|
<connection name="part0_sys_clock" component1="part0" component2="sys_clock">
|
939
|
<connection_map name="part0_sys_clock_1" c1_st_index="12" c1_end_index="12" c2_st_index="0" c2_end_index="0"/>
|
940
|
</connection>
|
941
|
|
942
|
|
943
|
<connection name="part0_hdmi_in" component1="part0" component2="hdmi_in">
|
944
|
<connection_map name="part0_hdmi_in_1" c1_st_index="14" c1_end_index="21" c2_st_index="0" c2_end_index="7"/>
|
945
|
|
946
|
<connection_map name="part0_hdmi_in_ddc" c1_st_index="31" c1_end_index="32" c2_st_index="0" c2_end_index="1"/>
|
947
|
</connection>
|
948
|
|
949
|
<connection name="part0_hdmi_in_hpd_led" component1="part0" component2="hdmi_in_hpd_led">
|
950
|
<connection_map name="part0_hdmi_in_hpd_led_1" c1_st_index="13" c1_end_index="13" c2_st_index="0" c2_end_index="0"/>
|
951
|
</connection>
|
952
|
|
953
|
<connection name="part0_hdmi_out" component1="part0" component2="hdmi_out">
|
954
|
<connection_map name="part0_hdmi_out_1" c1_st_index="23" c1_end_index="30" c2_st_index="0" c2_end_index="7"/>
|
955
|
</connection>
|
956
|
|
957
|
<connection name="part0_hdmi_out_hpd_led" component1="part0" component2="hdmi_out_hpd_led">
|
958
|
<connection_map name="part0_hdmi_out_hpd_led_1" c1_st_index="22" c1_end_index="22" c2_st_index="0" c2_end_index="0"/>
|
959
|
</connection>
|
960
|
|
961
|
|
962
|
<connection name="part0_ja" component1="part0" component2="ja">
|
963
|
<connection_map name="part0_ja_1" c1_st_index="39" c1_end_index="46" c2_st_index="0" c2_end_index="7"/>
|
964
|
</connection>
|
965
|
<connection name="part0_jb" component1="part0" component2="jb">
|
966
|
<connection_map name="part0_jb_1" c1_st_index="47" c1_end_index="54" c2_st_index="0" c2_end_index="7"/>
|
967
|
</connection>
|
968
|
<connection name="part0_jc" component1="part0" component2="jc">
|
969
|
<connection_map name="part0_jc_1" c1_st_index="55" c1_end_index="62" c2_st_index="0" c2_end_index="7"/>
|
970
|
</connection>
|
971
|
<connection name="part0_jd" component1="part0" component2="jd">
|
972
|
<connection_map name="part0_jd_1" c1_st_index="63" c1_end_index="70" c2_st_index="0" c2_end_index="7"/>
|
973
|
</connection>
|
974
|
<connection name="part0_je" component1="part0" component2="je">
|
975
|
<connection_map name="part0_je_1" c1_st_index="71" c1_end_index="78" c2_st_index="0" c2_end_index="7"/>
|
976
|
</connection>
|
977
|
<connection name="part0_rgb_led" component1="part0" component2="rgb_led">
|
978
|
<connection_map name="part0_rgb_led_1" c1_st_index="33" c1_end_index="38" c2_st_index="0" c2_end_index="5"/>
|
979
|
</connection>
|
980
|
</connections>
|
981
|
</board>
|