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Cannot build hardware for sd_demo

Added by Johan Henning almost 2 years ago

No block design is generated after running the .tcl script.

Log file:

current_project project_1
cd C:/AimaginProjects/Zybo/Hardware_Z7000/sd_demo
source sd_demo.tcl
  1. proc checkRequiredFiles { origin_dir} {
  2. set status true
  3. set files [list \
  4. "C:/Aimagin/zynq7000_xilinx/Other-Board_Files/zyboz7_project/vivado/My_Zybo-Z7-Master.xdc" \
  5. ]
  6. foreach ifile $files {
  7. if { ![file isfile $ifile] } {
  8. puts " Could not find remote file $ifile "
  9. set status false
  10. }
  11. }
  13. return $status
  14. }
  15. set origin_dir "."
  16. if { [info exists ::origin_dir_loc] } {
  17. set origin_dir $::origin_dir_loc
  18. }
  19. set xil_proj_name "project_1"
  20. if { [info exists ::user_project_name] } {
  21. set xil_proj_name $::user_project_name
  22. }
  23. variable script_file
  24. set script_file "sd_demo.tcl"
  25. proc print_help {} {
  26. variable script_file
  27. puts "\nDescription:"
  28. puts "Recreate a Vivado project from this script. The created project will be"
  29. puts "functionally equivalent to the original project for which this script was"
  30. puts "generated. The script contains commands for creating a project, filesets,"
  31. puts "runs, adding/importing sources and setting properties on various objects.\n"
  32. puts "Syntax:"
  33. puts "$script_file"
  34. puts "$script_file -tclargs \[--origin_dir <path>\]"
  35. puts "$script_file -tclargs \[--project_name <name>\]"
  36. puts "$script_file -tclargs \[--help\]\n"
  37. puts "Usage:"
  38. puts "Name Description"
  39. puts "-------------------------------------------------------------------------"
  40. puts "\[--origin_dir <path>\] Determine source file paths wrt this path. Default"
  41. puts " origin_dir path value is \".\", otherwise, the value"
  42. puts " that was set with the \"-paths_relative_to\" switch"
  43. puts " when this script was generated.\n"
  44. puts "\[--project_name <name>\] Create project with the specified name. Default"
  45. puts " name is the name of the project from where this"
  46. puts " script was generated.\n"
  47. puts "\[--help\] Print help information for this script"
  48. puts "-------------------------------------------------------------------------\n"
  49. exit 0
  50. }
  51. if { $::argc > 0 } {
  52. for {set i 0} {$i < $::argc} {incr i} {
  53. set option [string trim [lindex $::argv $i]]
  54. switch regexp - $option {
  55. "--origin_dir" { incr i; set origin_dir [lindex $::argv $i] }
  56. "--project_name" { incr i; set xil_proj_name [lindex $::argv $i] }
  57. "--help" { print_help }
  58. default {
  59. if { [regexp {^-} $option] } {
  60. puts "ERROR: Unknown option '$option' specified, please type '$script_file -tclargs --help' for usage info.\n"
  61. return 1
  62. }
  63. }
  64. }
  65. }
  66. }
  67. set orig_proj_dir "[file normalize "$origin_dir/project_1"]"
  68. set validate_required 0
  69. if { $validate_required } {
  70. if { [checkRequiredFiles $origin_dir] } {
  71. puts "Tcl file $script_file is valid. All files required for project creation is accesable. "
  72. } else {
  73. puts "Tcl file $script_file is not valid. Not all files required for project creation is accesable. "
  74. return
  75. }
  76. }
  77. create_project ${_xil_proj_name_} ./${_xil_proj_name_} -part xc7z020clg400-1
    INFO: [IP_Flow 19-234] Refreshing IP repositories
    INFO: [IP_Flow 19-1704] No user IP repositories specified
    INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2020.2/data/ip'.
  78. set proj_dir [get_property directory [current_project]]
  79. set obj [current_project]
  80. set_property -name "board_part_repo_paths" -value "[file normalize "$origin_dir/../../../../../../Users/admin/AppData/Roaming/Xilinx/Vivado/2020.2/xhub/board_store/xilinx_board_store"]" -objects $obj
    WARNING: [Vivado 12-9135] Ignoring repo path (C:/Users/admin/AppData/Roaming/Xilinx/Vivado/2020.2/xhub/board_store/xilinx_board_store) because it contains no board files
  81. set_property -name "board_part" -value "digilentinc.com:zybo-z7-20:part0:1.0" -objects $obj
  82. set_property -name "default_lib" -value "xil_defaultlib" -objects $obj
  83. set_property -name "enable_vhdl_2008" -value "1" -objects $obj
  84. set_property -name "ip_cache_permissions" -value "read write" -objects $obj
  85. set_property -name "ip_output_repo" -value "$proj_dir/${_xil_proj_name_}.cache/ip" -objects $obj
  86. set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj
  87. set_property -name "platform.board_id" -value "zybo-z7-20" -objects $obj
  88. set_property -name "sim.central_dir" -value "$proj_dir/${_xil_proj_name_}.ip_user_files" -objects $obj
  89. set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj
  90. set_property -name "simulator_language" -value "Mixed" -objects $obj
  91. set_property -name "target_language" -value "VHDL" -objects $obj
  92. if {[string equal [get_filesets -quiet sources_1] ""]} {
  93. create_fileset -srcset sources_1
  94. }
  95. set obj [get_filesets sources_1]
  96. set obj [get_filesets sources_1]
  97. set_property -name "top" -value "design_1_wrapper" -objects $obj
  98. if {[string equal [get_filesets -quiet constrs_1] ""]} {
  99. create_fileset -constrset constrs_1
  100. }
  101. set obj [get_filesets constrs_1]
  102. set file "[file normalize "$origin_dir/../My_Zybo-Z7-Master.xdc"]"
  103. set file_added [add_files -norecurse -fileset $obj [list $file]]
  104. set file "$origin_dir/../My_Zybo-Z7-Master.xdc"
  105. set file [file normalize $file]
  106. set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
  107. set_property -name "file_type" -value "XDC" -objects $file_obj
  108. set obj [get_filesets constrs_1]
  109. if {[string equal [get_filesets -quiet sim_1] ""]} {
  110. create_fileset -simset sim_1
  111. }
  112. set obj [get_filesets sim_1]
  113. set obj [get_filesets sim_1]
  114. set_property -name "hbs.configure_design_for_hier_access" -value "1" -objects $obj
  115. set_property -name "top" -value "design_1_wrapper" -objects $obj
  116. set_property -name "top_lib" -value "xil_defaultlib" -objects $obj
  117. set obj [get_filesets utils_1]
  118. set obj [get_filesets utils_1]
  119. proc cr_bd_design_1 { parentCell } {
  121. # CHANGE DESIGN NAME HERE
  122. set design_name design_1
  124. common::send_gid_msg -ssname BD::TCL -id 2010 -severity "INFO" "Currently there is no design <$design_name> in project, so creating one..."
  126. create_bd_design $design_name
  128. set bCheckIPsPassed 1
  129. ##################################################################
  130. # CHECK IPs
  131. ##################################################################
  132. set bCheckIPs 1
  133. if { $bCheckIPs == 1 } {
  134. set list_check_ips "\
  135. xilinx.com:ip:processing_system7:5.5\
  136. "
  138. set list_ips_missing ""
  139. common::send_gid_msg -ssname BD::TCL -id 2011 -severity "INFO" "Checking if the following IPs exist in the project's IP catalog: $list_check_ips ."
  141. foreach ip_vlnv $list_check_ips {
  142. set ip_obj [get_ipdefs -all $ip_vlnv]
  143. if { $ip_obj eq "" } {
  144. lappend list_ips_missing $ip_vlnv
  145. }
  146. }
  148. if { $list_ips_missing ne "" } {
  149. catch {common::send_gid_msg -ssname BD::TCL -id 2012 -severity "ERROR" "The following IPs are not found in the IP Catalog:\n $list_ips_missing\n\nResolution: Please add the repository containing the IP to the project." }
  150. set bCheckIPsPassed 0
  151. }
  153. }
  155. if { $bCheckIPsPassed != 1 } {
  156. common::send_gid_msg -ssname BD::TCL -id 2023 -severity "WARNING" "Will not continue with creation of design due to the error(s) above."
  157. return 3
  158. }
  160. variable script_folder
  162. if { $parentCell eq "" } {
  163. set parentCell [get_bd_cells /]
  164. }
  166. # Get object for parentCell
  167. set parentObj [get_bd_cells $parentCell]
  168. if { $parentObj == "" } {
  169. catch {common::send_gid_msg -ssname BD::TCL -id 2090 -severity "ERROR" "Unable to find parent cell <$parentCell>!"}
  170. return
  171. }
  173. # Make sure parentObj is hier blk
  174. set parentType [get_property TYPE $parentObj]
  175. if { $parentType ne "hier" } {
  176. catch {common::send_gid_msg -ssname BD::TCL -id 2091 -severity "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
  177. return
  178. }
  180. # Save current instance; Restore later
  181. set oldCurInst [current_bd_instance .]
  183. # Set parent object as current
  184. current_bd_instance $parentObj
  187. # Create interface ports
  188. set DDR [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR ]
  190. set FIXED_IO [ create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 FIXED_IO ]
  192. set GPIO_0_0 [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 GPIO_0_0 ]
  195. # Create ports
  197. # Create instance: processing_system7_0, and set properties
  198. set processing_system7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 processing_system7_0 ]
  199. set_property -dict [ list \
  200. CONFIG.PCW_ACT_APU_PERIPHERAL_FREQMHZ {666.666687} \
  201. CONFIG.PCW_ACT_CAN_PERIPHERAL_FREQMHZ {10.000000} \
  202. CONFIG.PCW_ACT_DCI_PERIPHERAL_FREQMHZ {10.158730} \
  203. CONFIG.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ {10.000000} \
  204. CONFIG.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ {10.000000} \
  205. CONFIG.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ {50.000000} \
  206. CONFIG.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ {10.000000} \
  207. CONFIG.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ {10.000000} \
  208. CONFIG.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ {10.000000} \
  209. CONFIG.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ {200.000000} \
  210. CONFIG.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ {200.000000} \
  211. CONFIG.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ {50.000000} \
  212. CONFIG.PCW_ACT_SMC_PERIPHERAL_FREQMHZ {10.000000} \
  213. CONFIG.PCW_ACT_SPI_PERIPHERAL_FREQMHZ {10.000000} \
  214. CONFIG.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ {200.000000} \
  215. CONFIG.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ {111.111115} \
  216. CONFIG.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ {111.111115} \
  217. CONFIG.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ {111.111115} \
  218. CONFIG.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ {111.111115} \
  219. CONFIG.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ {111.111115} \
  220. CONFIG.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ {111.111115} \
  221. CONFIG.PCW_ACT_UART_PERIPHERAL_FREQMHZ {100.000000} \
  222. CONFIG.PCW_ACT_WDT_PERIPHERAL_FREQMHZ {111.111115} \
  223. CONFIG.PCW_APU_CLK_RATIO_ENABLE {6:2:1} \
  224. CONFIG.PCW_APU_PERIPHERAL_FREQMHZ {667} \
  225. CONFIG.PCW_ARMPLL_CTRL_FBDIV {40} \
  226. CONFIG.PCW_CAN_PERIPHERAL_DIVISOR0 {1} \
  227. CONFIG.PCW_CAN_PERIPHERAL_DIVISOR1 {1} \
  228. CONFIG.PCW_CLK0_FREQ {50000000} \
  229. CONFIG.PCW_CLK1_FREQ {10000000} \
  230. CONFIG.PCW_CLK2_FREQ {10000000} \
  231. CONFIG.PCW_CLK3_FREQ {10000000} \
  232. CONFIG.PCW_CPU_CPU_6X4X_MAX_RANGE {667} \
  233. CONFIG.PCW_CPU_CPU_PLL_FREQMHZ {1333.333} \
  234. CONFIG.PCW_CPU_PERIPHERAL_CLKSRC {ARM PLL} \
  235. CONFIG.PCW_CPU_PERIPHERAL_DIVISOR0 {2} \
  236. CONFIG.PCW_CRYSTAL_PERIPHERAL_FREQMHZ {33.333333} \
  237. CONFIG.PCW_DCI_PERIPHERAL_CLKSRC {DDR PLL} \
  238. CONFIG.PCW_DCI_PERIPHERAL_DIVISOR0 {15} \
  239. CONFIG.PCW_DCI_PERIPHERAL_DIVISOR1 {7} \
  240. CONFIG.PCW_DCI_PERIPHERAL_FREQMHZ {10.159} \
  241. CONFIG.PCW_DDRPLL_CTRL_FBDIV {32} \
  242. CONFIG.PCW_DDR_DDR_PLL_FREQMHZ {1066.667} \
  243. CONFIG.PCW_DDR_HPRLPR_QUEUE_PARTITION {HPR/LPR} \
  244. CONFIG.PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL {15} \
  245. CONFIG.PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL {2} \
  246. CONFIG.PCW_DDR_PERIPHERAL_CLKSRC {DDR PLL} \
  247. CONFIG.PCW_DDR_PERIPHERAL_DIVISOR0 {2} \
  248. CONFIG.PCW_DDR_PORT0_HPR_ENABLE {0} \
  249. CONFIG.PCW_DDR_PORT1_HPR_ENABLE {0} \
  250. CONFIG.PCW_DDR_PORT2_HPR_ENABLE {0} \
  251. CONFIG.PCW_DDR_PORT3_HPR_ENABLE {0} \
  252. CONFIG.PCW_DDR_RAM_HIGHADDR {0x3FFFFFFF} \
  253. CONFIG.PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL {2} \
  254. CONFIG.PCW_ENET0_ENET0_IO {<Select>} \
  255. CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {0} \
  256. CONFIG.PCW_ENET0_GRP_MDIO_IO {<Select>} \
  257. CONFIG.PCW_ENET0_PERIPHERAL_CLKSRC {IO PLL} \
  258. CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR0 {1} \
  259. CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR1 {1} \
  260. CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {0} \
  261. CONFIG.PCW_ENET0_PERIPHERAL_FREQMHZ {1000 Mbps} \
  262. CONFIG.PCW_ENET0_RESET_ENABLE {0} \
  263. CONFIG.PCW_ENET1_GRP_MDIO_ENABLE {0} \
  264. CONFIG.PCW_ENET1_PERIPHERAL_CLKSRC {IO PLL} \
  265. CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR0 {1} \
  266. CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR1 {1} \
  267. CONFIG.PCW_ENET1_PERIPHERAL_ENABLE {0} \
  268. CONFIG.PCW_ENET1_PERIPHERAL_FREQMHZ {1000 Mbps} \
  269. CONFIG.PCW_ENET1_RESET_ENABLE {0} \
  270. CONFIG.PCW_ENET_RESET_ENABLE {1} \
  271. CONFIG.PCW_ENET_RESET_POLARITY {Active Low} \
  272. CONFIG.PCW_ENET_RESET_SELECT {<Select>} \
  273. CONFIG.PCW_EN_4K_TIMER {0} \
  274. CONFIG.PCW_EN_EMIO_GPIO {1} \
  275. CONFIG.PCW_EN_ENET0 {0} \
  276. CONFIG.PCW_EN_GPIO {1} \
  277. CONFIG.PCW_EN_QSPI {1} \
  278. CONFIG.PCW_EN_SDIO0 {1} \
  279. CONFIG.PCW_EN_UART1 {1} \
  280. CONFIG.PCW_EN_USB0 {0} \
  281. CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR0 {8} \
  282. CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR1 {4} \
  283. CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR0 {1} \
  284. CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR1 {1} \
  285. CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR0 {1} \
  286. CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR1 {1} \
  287. CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR0 {1} \
  288. CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR1 {1} \
  289. CONFIG.PCW_FPGA_FCLK0_ENABLE {1} \
  290. CONFIG.PCW_FPGA_FCLK1_ENABLE {0} \
  291. CONFIG.PCW_FPGA_FCLK2_ENABLE {0} \
  292. CONFIG.PCW_FPGA_FCLK3_ENABLE {0} \
  293. CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {1} \
  294. CONFIG.PCW_GPIO_EMIO_GPIO_IO {18} \
  295. CONFIG.PCW_GPIO_EMIO_GPIO_WIDTH {18} \
  296. CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} \
  297. CONFIG.PCW_GPIO_MIO_GPIO_IO {MIO} \
  298. CONFIG.PCW_GPIO_PERIPHERAL_ENABLE {0} \
  299. CONFIG.PCW_I2C0_RESET_ENABLE {0} \
  300. CONFIG.PCW_I2C1_RESET_ENABLE {0} \
  301. CONFIG.PCW_I2C_PERIPHERAL_FREQMHZ {25} \
  302. CONFIG.PCW_I2C_RESET_ENABLE {0} \
  303. CONFIG.PCW_IOPLL_CTRL_FBDIV {48} \
  304. CONFIG.PCW_IO_IO_PLL_FREQMHZ {1600.000} \
  305. CONFIG.PCW_IRQ_F2P_MODE {DIRECT} \
  306. CONFIG.PCW_MIO_0_DIRECTION {inout} \
  307. CONFIG.PCW_MIO_0_IOTYPE {LVCMOS 3.3V} \
  308. CONFIG.PCW_MIO_0_PULLUP {enabled} \
  309. CONFIG.PCW_MIO_0_SLEW {slow} \
  310. CONFIG.PCW_MIO_10_DIRECTION {inout} \
  311. CONFIG.PCW_MIO_10_IOTYPE {LVCMOS 3.3V} \
  312. CONFIG.PCW_MIO_10_PULLUP {enabled} \
  313. CONFIG.PCW_MIO_10_SLEW {slow} \
  314. CONFIG.PCW_MIO_11_DIRECTION {inout} \
  315. CONFIG.PCW_MIO_11_IOTYPE {LVCMOS 3.3V} \
  316. CONFIG.PCW_MIO_11_PULLUP {enabled} \
  317. CONFIG.PCW_MIO_11_SLEW {slow} \
  318. CONFIG.PCW_MIO_12_DIRECTION {inout} \
  319. CONFIG.PCW_MIO_12_IOTYPE {LVCMOS 3.3V} \
  320. CONFIG.PCW_MIO_12_PULLUP {enabled} \
  321. CONFIG.PCW_MIO_12_SLEW {slow} \
  322. CONFIG.PCW_MIO_13_DIRECTION {inout} \
  323. CONFIG.PCW_MIO_13_IOTYPE {LVCMOS 3.3V} \
  324. CONFIG.PCW_MIO_13_PULLUP {enabled} \
  325. CONFIG.PCW_MIO_13_SLEW {slow} \
  326. CONFIG.PCW_MIO_14_DIRECTION {inout} \
  327. CONFIG.PCW_MIO_14_IOTYPE {LVCMOS 3.3V} \
  328. CONFIG.PCW_MIO_14_PULLUP {enabled} \
  329. CONFIG.PCW_MIO_14_SLEW {slow} \
  330. CONFIG.PCW_MIO_15_DIRECTION {inout} \
  331. CONFIG.PCW_MIO_15_IOTYPE {LVCMOS 3.3V} \
  332. CONFIG.PCW_MIO_15_PULLUP {enabled} \
  333. CONFIG.PCW_MIO_15_SLEW {slow} \
  334. CONFIG.PCW_MIO_16_DIRECTION {out} \
  335. CONFIG.PCW_MIO_16_IOTYPE {LVCMOS 1.8V} \
  336. CONFIG.PCW_MIO_16_PULLUP {enabled} \
  337. CONFIG.PCW_MIO_16_SLEW {fast} \
  338. CONFIG.PCW_MIO_17_DIRECTION {out} \
  339. CONFIG.PCW_MIO_17_IOTYPE {LVCMOS 1.8V} \
  340. CONFIG.PCW_MIO_17_PULLUP {enabled} \
  341. CONFIG.PCW_MIO_17_SLEW {fast} \
  342. CONFIG.PCW_MIO_18_DIRECTION {out} \
  343. CONFIG.PCW_MIO_18_IOTYPE {LVCMOS 1.8V} \
  344. CONFIG.PCW_MIO_18_PULLUP {enabled} \
  345. CONFIG.PCW_MIO_18_SLEW {fast} \
  346. CONFIG.PCW_MIO_19_DIRECTION {out} \
  347. CONFIG.PCW_MIO_19_IOTYPE {LVCMOS 1.8V} \
  348. CONFIG.PCW_MIO_19_PULLUP {enabled} \
  349. CONFIG.PCW_MIO_19_SLEW {fast} \
  350. CONFIG.PCW_MIO_1_DIRECTION {out} \
  351. CONFIG.PCW_MIO_1_IOTYPE {LVCMOS 3.3V} \
  352. CONFIG.PCW_MIO_1_PULLUP {enabled} \
  353. CONFIG.PCW_MIO_1_SLEW {slow} \
  354. CONFIG.PCW_MIO_20_DIRECTION {out} \
  355. CONFIG.PCW_MIO_20_IOTYPE {LVCMOS 1.8V} \
  356. CONFIG.PCW_MIO_20_PULLUP {enabled} \
  357. CONFIG.PCW_MIO_20_SLEW {fast} \
  358. CONFIG.PCW_MIO_21_DIRECTION {out} \
  359. CONFIG.PCW_MIO_21_IOTYPE {LVCMOS 1.8V} \
  360. CONFIG.PCW_MIO_21_PULLUP {enabled} \
  361. CONFIG.PCW_MIO_21_SLEW {fast} \
  362. CONFIG.PCW_MIO_22_DIRECTION {in} \
  363. CONFIG.PCW_MIO_22_IOTYPE {LVCMOS 1.8V} \
  364. CONFIG.PCW_MIO_22_PULLUP {enabled} \
  365. CONFIG.PCW_MIO_22_SLEW {fast} \
  366. CONFIG.PCW_MIO_23_DIRECTION {in} \
  367. CONFIG.PCW_MIO_23_IOTYPE {LVCMOS 1.8V} \
  368. CONFIG.PCW_MIO_23_PULLUP {enabled} \
  369. CONFIG.PCW_MIO_23_SLEW {fast} \
  370. CONFIG.PCW_MIO_24_DIRECTION {in} \
  371. CONFIG.PCW_MIO_24_IOTYPE {LVCMOS 1.8V} \
  372. CONFIG.PCW_MIO_24_PULLUP {enabled} \
  373. CONFIG.PCW_MIO_24_SLEW {fast} \
  374. CONFIG.PCW_MIO_25_DIRECTION {in} \
  375. CONFIG.PCW_MIO_25_IOTYPE {LVCMOS 1.8V} \
  376. CONFIG.PCW_MIO_25_PULLUP {enabled} \
  377. CONFIG.PCW_MIO_25_SLEW {fast} \
  378. CONFIG.PCW_MIO_26_DIRECTION {in} \
  379. CONFIG.PCW_MIO_26_IOTYPE {LVCMOS 1.8V} \
  380. CONFIG.PCW_MIO_26_PULLUP {enabled} \
  381. CONFIG.PCW_MIO_26_SLEW {fast} \
  382. CONFIG.PCW_MIO_27_DIRECTION {in} \
  383. CONFIG.PCW_MIO_27_IOTYPE {LVCMOS 1.8V} \
  384. CONFIG.PCW_MIO_27_PULLUP {enabled} \
  385. CONFIG.PCW_MIO_27_SLEW {fast} \
  386. CONFIG.PCW_MIO_28_DIRECTION {inout} \
  387. CONFIG.PCW_MIO_28_IOTYPE {LVCMOS 1.8V} \
  388. CONFIG.PCW_MIO_28_PULLUP {enabled} \
  389. CONFIG.PCW_MIO_28_SLEW {fast} \
  390. CONFIG.PCW_MIO_29_DIRECTION {inout} \
  391. CONFIG.PCW_MIO_29_IOTYPE {LVCMOS 1.8V} \
  392. CONFIG.PCW_MIO_29_PULLUP {enabled} \
  393. CONFIG.PCW_MIO_29_SLEW {fast} \
  394. CONFIG.PCW_MIO_2_DIRECTION {inout} \
  395. CONFIG.PCW_MIO_2_IOTYPE {LVCMOS 3.3V} \
  396. CONFIG.PCW_MIO_2_PULLUP {disabled} \
  397. CONFIG.PCW_MIO_2_SLEW {slow} \
  398. CONFIG.PCW_MIO_30_DIRECTION {inout} \
  399. CONFIG.PCW_MIO_30_IOTYPE {LVCMOS 1.8V} \
  400. CONFIG.PCW_MIO_30_PULLUP {enabled} \
  401. CONFIG.PCW_MIO_30_SLEW {fast} \
  402. CONFIG.PCW_MIO_31_DIRECTION {inout} \
  403. CONFIG.PCW_MIO_31_IOTYPE {LVCMOS 1.8V} \
  404. CONFIG.PCW_MIO_31_PULLUP {enabled} \
  405. CONFIG.PCW_MIO_31_SLEW {fast} \
  406. CONFIG.PCW_MIO_32_DIRECTION {inout} \
  407. CONFIG.PCW_MIO_32_IOTYPE {LVCMOS 1.8V} \
  408. CONFIG.PCW_MIO_32_PULLUP {enabled} \
  409. CONFIG.PCW_MIO_32_SLEW {fast} \
  410. CONFIG.PCW_MIO_33_DIRECTION {inout} \
  411. CONFIG.PCW_MIO_33_IOTYPE {LVCMOS 1.8V} \
  412. CONFIG.PCW_MIO_33_PULLUP {enabled} \
  413. CONFIG.PCW_MIO_33_SLEW {fast} \
  414. CONFIG.PCW_MIO_34_DIRECTION {inout} \
  415. CONFIG.PCW_MIO_34_IOTYPE {LVCMOS 1.8V} \
  416. CONFIG.PCW_MIO_34_PULLUP {enabled} \
  417. CONFIG.PCW_MIO_34_SLEW {fast} \
  418. CONFIG.PCW_MIO_35_DIRECTION {inout} \
  419. CONFIG.PCW_MIO_35_IOTYPE {LVCMOS 1.8V} \
  420. CONFIG.PCW_MIO_35_PULLUP {enabled} \
  421. CONFIG.PCW_MIO_35_SLEW {fast} \
  422. CONFIG.PCW_MIO_36_DIRECTION {inout} \
  423. CONFIG.PCW_MIO_36_IOTYPE {LVCMOS 1.8V} \
  424. CONFIG.PCW_MIO_36_PULLUP {enabled} \
  425. CONFIG.PCW_MIO_36_SLEW {fast} \
  426. CONFIG.PCW_MIO_37_DIRECTION {inout} \
  427. CONFIG.PCW_MIO_37_IOTYPE {LVCMOS 1.8V} \
  428. CONFIG.PCW_MIO_37_PULLUP {enabled} \
  429. CONFIG.PCW_MIO_37_SLEW {fast} \
  430. CONFIG.PCW_MIO_38_DIRECTION {inout} \
  431. CONFIG.PCW_MIO_38_IOTYPE {LVCMOS 1.8V} \
  432. CONFIG.PCW_MIO_38_PULLUP {enabled} \
  433. CONFIG.PCW_MIO_38_SLEW {fast} \
  434. CONFIG.PCW_MIO_39_DIRECTION {inout} \
  435. CONFIG.PCW_MIO_39_IOTYPE {LVCMOS 1.8V} \
  436. CONFIG.PCW_MIO_39_PULLUP {enabled} \
  437. CONFIG.PCW_MIO_39_SLEW {fast} \
  438. CONFIG.PCW_MIO_3_DIRECTION {inout} \
  439. CONFIG.PCW_MIO_3_IOTYPE {LVCMOS 3.3V} \
  440. CONFIG.PCW_MIO_3_PULLUP {disabled} \
  441. CONFIG.PCW_MIO_3_SLEW {slow} \
  442. CONFIG.PCW_MIO_40_DIRECTION {inout} \
  443. CONFIG.PCW_MIO_40_IOTYPE {LVCMOS 1.8V} \
  444. CONFIG.PCW_MIO_40_PULLUP {enabled} \
  445. CONFIG.PCW_MIO_40_SLEW {slow} \
  446. CONFIG.PCW_MIO_41_DIRECTION {inout} \
  447. CONFIG.PCW_MIO_41_IOTYPE {LVCMOS 1.8V} \
  448. CONFIG.PCW_MIO_41_PULLUP {enabled} \
  449. CONFIG.PCW_MIO_41_SLEW {slow} \
  450. CONFIG.PCW_MIO_42_DIRECTION {inout} \
  451. CONFIG.PCW_MIO_42_IOTYPE {LVCMOS 1.8V} \
  452. CONFIG.PCW_MIO_42_PULLUP {enabled} \
  453. CONFIG.PCW_MIO_42_SLEW {slow} \
  454. CONFIG.PCW_MIO_43_DIRECTION {inout} \
  455. CONFIG.PCW_MIO_43_IOTYPE {LVCMOS 1.8V} \
  456. CONFIG.PCW_MIO_43_PULLUP {enabled} \
  457. CONFIG.PCW_MIO_43_SLEW {slow} \
  458. CONFIG.PCW_MIO_44_DIRECTION {inout} \
  459. CONFIG.PCW_MIO_44_IOTYPE {LVCMOS 1.8V} \
  460. CONFIG.PCW_MIO_44_PULLUP {enabled} \
  461. CONFIG.PCW_MIO_44_SLEW {slow} \
  462. CONFIG.PCW_MIO_45_DIRECTION {inout} \
  463. CONFIG.PCW_MIO_45_IOTYPE {LVCMOS 1.8V} \
  464. CONFIG.PCW_MIO_45_PULLUP {enabled} \
  465. CONFIG.PCW_MIO_45_SLEW {slow} \
  466. CONFIG.PCW_MIO_46_DIRECTION {out} \
  467. CONFIG.PCW_MIO_46_IOTYPE {LVCMOS 1.8V} \
  468. CONFIG.PCW_MIO_46_PULLUP {enabled} \
  469. CONFIG.PCW_MIO_46_SLEW {slow} \
  470. CONFIG.PCW_MIO_47_DIRECTION {in} \
  471. CONFIG.PCW_MIO_47_IOTYPE {LVCMOS 1.8V} \
  472. CONFIG.PCW_MIO_47_PULLUP {enabled} \
  473. CONFIG.PCW_MIO_47_SLEW {slow} \
  474. CONFIG.PCW_MIO_48_DIRECTION {out} \
  475. CONFIG.PCW_MIO_48_IOTYPE {LVCMOS 1.8V} \
  476. CONFIG.PCW_MIO_48_PULLUP {enabled} \
  477. CONFIG.PCW_MIO_48_SLEW {slow} \
  478. CONFIG.PCW_MIO_49_DIRECTION {in} \
  479. CONFIG.PCW_MIO_49_IOTYPE {LVCMOS 1.8V} \
  480. CONFIG.PCW_MIO_49_PULLUP {enabled} \
  481. CONFIG.PCW_MIO_49_SLEW {slow} \
  482. CONFIG.PCW_MIO_4_DIRECTION {inout} \
  483. CONFIG.PCW_MIO_4_IOTYPE {LVCMOS 3.3V} \
  484. CONFIG.PCW_MIO_4_PULLUP {disabled} \
  485. CONFIG.PCW_MIO_4_SLEW {slow} \
  486. CONFIG.PCW_MIO_50_DIRECTION {inout} \
  487. CONFIG.PCW_MIO_50_IOTYPE {LVCMOS 1.8V} \
  488. CONFIG.PCW_MIO_50_PULLUP {enabled} \
  489. CONFIG.PCW_MIO_50_SLEW {slow} \
  490. CONFIG.PCW_MIO_51_DIRECTION {inout} \
  491. CONFIG.PCW_MIO_51_IOTYPE {LVCMOS 1.8V} \
  492. CONFIG.PCW_MIO_51_PULLUP {enabled} \
  493. CONFIG.PCW_MIO_51_SLEW {slow} \
  494. CONFIG.PCW_MIO_52_DIRECTION {out} \
  495. CONFIG.PCW_MIO_52_IOTYPE {LVCMOS 1.8V} \
  496. CONFIG.PCW_MIO_52_PULLUP {enabled} \
  497. CONFIG.PCW_MIO_52_SLEW {slow} \
  498. CONFIG.PCW_MIO_53_DIRECTION {inout} \
  499. CONFIG.PCW_MIO_53_IOTYPE {LVCMOS 1.8V} \
  500. CONFIG.PCW_MIO_53_PULLUP {enabled} \
  501. CONFIG.PCW_MIO_53_SLEW {slow} \
  502. CONFIG.PCW_MIO_5_DIRECTION {inout} \
  503. CONFIG.PCW_MIO_5_IOTYPE {LVCMOS 3.3V} \
  504. CONFIG.PCW_MIO_5_PULLUP {disabled} \
  505. CONFIG.PCW_MIO_5_SLEW {slow} \
  506. CONFIG.PCW_MIO_6_DIRECTION {out} \
  507. CONFIG.PCW_MIO_6_IOTYPE {LVCMOS 3.3V} \
  508. CONFIG.PCW_MIO_6_PULLUP {disabled} \
  509. CONFIG.PCW_MIO_6_SLEW {slow} \
  510. CONFIG.PCW_MIO_7_DIRECTION {out} \
  511. CONFIG.PCW_MIO_7_IOTYPE {LVCMOS 3.3V} \
  512. CONFIG.PCW_MIO_7_PULLUP {disabled} \
  513. CONFIG.PCW_MIO_7_SLEW {slow} \
  514. CONFIG.PCW_MIO_8_DIRECTION {out} \
  515. CONFIG.PCW_MIO_8_IOTYPE {LVCMOS 3.3V} \
  516. CONFIG.PCW_MIO_8_PULLUP {disabled} \
  517. CONFIG.PCW_MIO_8_SLEW {slow} \
  518. CONFIG.PCW_MIO_9_DIRECTION {inout} \
  519. CONFIG.PCW_MIO_9_IOTYPE {LVCMOS 3.3V} \
  520. CONFIG.PCW_MIO_9_PULLUP {enabled} \
  521. CONFIG.PCW_MIO_9_SLEW {slow} \
  522. CONFIG.PCW_MIO_TREE_PERIPHERALS { \
  523. 0#GPIO#SD 0#UART \
  524. 0#SD 0#SD \
  525. 0#SD 0#SD \
  526. 1#UART 1#GPIO#GPIO#GPIO#GPIO \
  527. Flash#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#SD 0#SD \
  528. Flash#GPIO#Quad SPI \
  529. Flash#Quad SPI \
  530. Flash#Quad SPI \
  531. Flash#Quad SPI \
  532. Flash#Quad SPI \
  533. Flash#Quad SPI \
  534. GPIO#Quad SPI \
  535. } \
  536. CONFIG.PCW_MIO_TREE_SIGNALS {gpio0#qspi0_ss_b#qspi0_io0#qspi0_io1#qspi0_io2#qspi0_io3/HOLD_B#qspi0_sclk#gpio7#qspi_fbclk#gpio9#gpio10#gpio11#gpio12#gpio13#gpio14#gpio15#gpio16#gpio17#gpio18#gpio19#gpio20#gpio21#gpio22#gpio23#gpio24#gpio25#gpio26#gpio27#gpio28#gpio29#gpio30#gpio31#gpio32#gpio33#gpio34#gpio35#gpio36#gpio37#gpio38#gpio39#clk#cmd#data0#data1#data2#data3#gpio46#cd#tx#rx#gpio50#gpio51#gpio52#gpio53} \
  537. CONFIG.PCW_NAND_GRP_D8_ENABLE {0} \
  538. CONFIG.PCW_NAND_PERIPHERAL_ENABLE {0} \
  539. CONFIG.PCW_NOR_GRP_A25_ENABLE {0} \
  540. CONFIG.PCW_NOR_GRP_CS0_ENABLE {0} \
  541. CONFIG.PCW_NOR_GRP_CS1_ENABLE {0} \
  542. CONFIG.PCW_NOR_GRP_SRAM_CS0_ENABLE {0} \
  543. CONFIG.PCW_NOR_GRP_SRAM_CS1_ENABLE {0} \
  544. CONFIG.PCW_NOR_GRP_SRAM_INT_ENABLE {0} \
  545. CONFIG.PCW_NOR_PERIPHERAL_ENABLE {0} \
  546. CONFIG.PCW_OVERRIDE_BASIC_CLOCK {0} \
  547. CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY0 {0.221} \
  548. CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY1 {0.222} \
  549. CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY2 {0.217} \
  550. CONFIG.PCW_PACKAGE_DDR_BOARD_DELAY3 {0.244} \
  551. CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0 {-0.050} \
  552. CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1 {-0.044} \
  553. CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2 {-0.035} \
  554. CONFIG.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3 {-0.100} \
  555. CONFIG.PCW_PCAP_PERIPHERAL_CLKSRC {IO PLL} \
  556. CONFIG.PCW_PCAP_PERIPHERAL_DIVISOR0 {8} \
  557. CONFIG.PCW_PCAP_PERIPHERAL_FREQMHZ {200} \
  558. CONFIG.PCW_PJTAG_PERIPHERAL_ENABLE {0} \
  559. CONFIG.PCW_PLL_BYPASSMODE_ENABLE {0} \
  560. CONFIG.PCW_PRESET_BANK0_VOLTAGE {LVCMOS 3.3V} \
  561. CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V} \
  562. CONFIG.PCW_QSPI_GRP_FBCLK_ENABLE {1} \
  563. CONFIG.PCW_QSPI_GRP_FBCLK_IO {MIO 8} \
  564. CONFIG.PCW_QSPI_GRP_IO1_ENABLE {0} \
  565. CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE {1} \
  566. CONFIG.PCW_QSPI_GRP_SINGLE_SS_IO {MIO 1 .. 6} \
  567. CONFIG.PCW_QSPI_GRP_SS1_ENABLE {0} \
  568. CONFIG.PCW_QSPI_INTERNAL_HIGHADDRESS {0xFCFFFFFF} \
  569. CONFIG.PCW_QSPI_PERIPHERAL_CLKSRC {IO PLL} \
  570. CONFIG.PCW_QSPI_PERIPHERAL_DIVISOR0 {8} \
  571. CONFIG.PCW_QSPI_PERIPHERAL_ENABLE {1} \
  572. CONFIG.PCW_QSPI_PERIPHERAL_FREQMHZ {200} \
  573. CONFIG.PCW_QSPI_QSPI_IO {MIO 1 .. 6} \
  574. CONFIG.PCW_SD0_GRP_CD_ENABLE {1} \
  575. CONFIG.PCW_SD0_GRP_CD_IO {MIO 47} \
  576. CONFIG.PCW_SD0_GRP_POW_ENABLE {0} \
  577. CONFIG.PCW_SD0_GRP_WP_ENABLE {0} \
  578. CONFIG.PCW_SD0_PERIPHERAL_ENABLE {1} \
  579. CONFIG.PCW_SD0_SD0_IO {MIO 40 .. 45} \
  580. CONFIG.PCW_SDIO_PERIPHERAL_CLKSRC {IO PLL} \
  581. CONFIG.PCW_SDIO_PERIPHERAL_DIVISOR0 {32} \
  582. CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {50} \
  583. CONFIG.PCW_SDIO_PERIPHERAL_VALID {1} \
  584. CONFIG.PCW_SINGLE_QSPI_DATA_MODE {x4} \
  585. CONFIG.PCW_SMC_PERIPHERAL_CLKSRC {IO PLL} \
  586. CONFIG.PCW_SMC_PERIPHERAL_DIVISOR0 {1} \
  587. CONFIG.PCW_SMC_PERIPHERAL_FREQMHZ {100} \
  588. CONFIG.PCW_SPI_PERIPHERAL_DIVISOR0 {1} \
  589. CONFIG.PCW_TPIU_PERIPHERAL_CLKSRC {External} \
  590. CONFIG.PCW_TPIU_PERIPHERAL_DIVISOR0 {1} \
  591. CONFIG.PCW_TPIU_PERIPHERAL_FREQMHZ {200} \
  592. CONFIG.PCW_UART1_BAUD_RATE {115200} \
  593. CONFIG.PCW_UART1_GRP_FULL_ENABLE {0} \
  594. CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1} \
  595. CONFIG.PCW_UART1_UART1_IO {MIO 48 .. 49} \
  596. CONFIG.PCW_UART_PERIPHERAL_CLKSRC {IO PLL} \
  597. CONFIG.PCW_UART_PERIPHERAL_DIVISOR0 {16} \
  598. CONFIG.PCW_UART_PERIPHERAL_FREQMHZ {100} \
  599. CONFIG.PCW_UART_PERIPHERAL_VALID {1} \
  600. CONFIG.PCW_UIPARAM_ACT_DDR_FREQ_MHZ {533.333374} \
  601. CONFIG.PCW_UIPARAM_DDR_ADV_ENABLE {0} \
  602. CONFIG.PCW_UIPARAM_DDR_AL {0} \
  603. CONFIG.PCW_UIPARAM_DDR_BANK_ADDR_COUNT {3} \
  604. CONFIG.PCW_UIPARAM_DDR_BL {8} \
  605. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.221} \
  606. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.222} \
  607. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.217} \
  608. CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.244} \
  609. CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {32 Bit} \
  610. CONFIG.PCW_UIPARAM_DDR_CL {7} \
  611. CONFIG.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM {18.8} \
  612. CONFIG.PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH {80.4535} \
  613. CONFIG.PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY {160} \
  614. CONFIG.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM {18.8} \
  615. CONFIG.PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH {80.4535} \
  616. CONFIG.PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY {160} \
  617. CONFIG.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM {18.8} \
  618. CONFIG.PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH {80.4535} \
  619. CONFIG.PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY {160} \
  620. CONFIG.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM {18.8} \
  621. CONFIG.PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH {80.4535} \
  622. CONFIG.PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY {160} \
  623. CONFIG.PCW_UIPARAM_DDR_CLOCK_STOP_EN {0} \
  624. CONFIG.PCW_UIPARAM_DDR_COL_ADDR_COUNT {10} \
  625. CONFIG.PCW_UIPARAM_DDR_CWL {6} \
  626. CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY {4096 MBits} \
  627. CONFIG.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM {22.8} \
  628. CONFIG.PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH {105.056} \
  629. CONFIG.PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY {160} \
  630. CONFIG.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM {27.9} \
  631. CONFIG.PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH {66.904} \
  632. CONFIG.PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY {160} \
  633. CONFIG.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM {22.9} \
  634. CONFIG.PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH {89.1715} \
  635. CONFIG.PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY {160} \
  636. CONFIG.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM {29.4} \
  637. CONFIG.PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH {113.63} \
  638. CONFIG.PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY {160} \
  639. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {-0.050} \
  640. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {-0.044} \
  641. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {-0.035} \
  642. CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {-0.100} \
  643. CONFIG.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM {22.8} \
  644. CONFIG.PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH {98.503} \
  645. CONFIG.PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY {160} \
  646. CONFIG.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM {27.9} \
  647. CONFIG.PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH {68.5855} \
  648. CONFIG.PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY {160} \
  649. CONFIG.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM {22.9} \
  650. CONFIG.PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH {90.295} \
  651. CONFIG.PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY {160} \
  652. CONFIG.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM {29.4} \
  653. CONFIG.PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH {103.977} \
  654. CONFIG.PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY {160} \
  655. CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH {16 Bits} \
  656. CONFIG.PCW_UIPARAM_DDR_ECC {Disabled} \
  657. CONFIG.PCW_UIPARAM_DDR_ENABLE {1} \
  658. CONFIG.PCW_UIPARAM_DDR_FREQ_MHZ {533.333333} \
  659. CONFIG.PCW_UIPARAM_DDR_HIGH_TEMP {Normal (0-85)} \
  660. CONFIG.PCW_UIPARAM_DDR_MEMORY_TYPE {DDR 3 (Low Voltage)} \
  661. CONFIG.PCW_UIPARAM_DDR_PARTNO {MT41K256M16 RE-125} \
  662. CONFIG.PCW_UIPARAM_DDR_ROW_ADDR_COUNT {15} \
  663. CONFIG.PCW_UIPARAM_DDR_SPEED_BIN {DDR3_1066F} \
  664. CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE {1} \
  665. CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE {1} \
  666. CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL {1} \
  667. CONFIG.PCW_UIPARAM_DDR_T_FAW {40.0} \
  668. CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {35.0} \
  669. CONFIG.PCW_UIPARAM_DDR_T_RC {48.75} \
  670. CONFIG.PCW_UIPARAM_DDR_T_RCD {7} \
  671. CONFIG.PCW_UIPARAM_DDR_T_RP {7} \
  672. CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {0} \
  673. CONFIG.PCW_USB0_PERIPHERAL_ENABLE {0} \
  674. CONFIG.PCW_USB0_PERIPHERAL_FREQMHZ {60} \
  675. CONFIG.PCW_USB0_RESET_ENABLE {1} \
  676. CONFIG.PCW_USB0_RESET_IO {MIO 46} \
  677. CONFIG.PCW_USB0_USB0_IO {<Select>} \
  678. CONFIG.PCW_USB1_RESET_ENABLE {0} \
  679. CONFIG.PCW_USB_RESET_ENABLE {1} \
  680. CONFIG.PCW_USB_RESET_POLARITY {Active Low} \
  681. CONFIG.PCW_USB_RESET_SELECT {<Select>} \
  682. CONFIG.PCW_USE_AXI_NONSECURE {0} \
  683. CONFIG.PCW_USE_CROSS_TRIGGER {0} \
  684. CONFIG.PCW_USE_M_AXI_GP0 {0} \
  685. ] $processing_system7_0
  687. # Create interface connections
  688. connect_bd_intf_net -intf_net processing_system7_0_DDR [get_bd_intf_ports DDR] [get_bd_intf_pins processing_system7_0/DDR]
  689. connect_bd_intf_net -intf_net processing_system7_0_FIXED_IO [get_bd_intf_ports FIXED_IO] [get_bd_intf_pins processing_system7_0/FIXED_IO]
  690. connect_bd_intf_net -intf_net processing_system7_0_GPIO_0 [get_bd_intf_ports GPIO_0_0] [get_bd_intf_pins processing_system7_0/GPIO_0]
  692. # Create port connections
  694. # Create address segments
  697. # Restore current instance
  698. current_bd_instance $oldCurInst
  700. validate_bd_design
  701. save_bd_design
  702. close_bd_design $design_name
  703. }
  704. cr_bd_design_1 ""
    INFO: [BD::TCL 103-2010] Currently there is no design <design_1> in project, so creating one...
    Wrote : <C:\AimaginProjects\Zybo\Hardware_Z7000\sd_demo\project_1\project_1.srcs\sources_1\bd\design_1\design_1.bd>
    INFO: [BD::TCL 103-2011] Checking if the following IPs exist in the project's IP catalog:
    xilinx.com:ip:processing_system7:5.5 .
    CRITICAL WARNING: [PSU-1] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.050 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-2] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 has negative value -0.044 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-3] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.035 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-4] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.100 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-1] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.050 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-2] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 has negative value -0.044 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-3] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.035 . PS DDR interfaces might fail when entering negative DQS skew values.
    CRITICAL WARNING: [PSU-4] Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.100 . PS DDR interfaces might fail when entering negative DQS skew values.
    Wrote : <C:/AimaginProjects/Zybo/Hardware_Z7000/sd_demo/project_1/project_1.srcs/sources_1/bd/design_1/ui/bd_1f5defd0.ui>
  705. set_property REGISTERED_WITH_MANAGER "1" [get_files design_1.bd ]
  706. set_property SYNTH_CHECKPOINT_MODE "Hierarchical" [get_files design_1.bd ]
  707. if { [get_property IS_LOCKED [ get_files -norecurse design_1.bd] ] == 1 } {
  708. import_files -fileset sources_1 [file normalize "${origin_dir}/project_1/project_1.gen/sources_1/bd/design_1/hdl/design_1_wrapper.vhd" ]
  709. } else {
  710. set wrapper_path [make_wrapper -fileset sources_1 -files [ get_files -norecurse design_1.bd] -top]
  711. add_files -norecurse -fileset sources_1 $wrapper_path
  712. }
    INFO: [BD 41-1662] The design 'design_1.bd' is already validated. Therefore parameter propagation will not be re-run.
    VHDL Output written to : c:/AimaginProjects/Zybo/Hardware_Z7000/sd_demo/project_1/project_1.gen/sources_1/bd/design_1/synth/design_1.vhd
    VHDL Output written to : c:/AimaginProjects/Zybo/Hardware_Z7000/sd_demo/project_1/project_1.gen/sources_1/bd/design_1/sim/design_1.vhd
    VHDL Output written to : c:/AimaginProjects/Zybo/Hardware_Z7000/sd_demo/project_1/project_1.gen/sources_1/bd/design_1/hdl/design_1_wrapper.vhd
  713. if {[string equal [get_runs -quiet synth_1] ""]} {
  714. create_run -name synth_1 -part xc7z020clg400-1 -flow {Vivado Synthesis 2020} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1
  715. } else {
  716. set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1]
  717. set_property flow "Vivado Synthesis 2020" [get_runs synth_1]
  718. }
  719. set obj [get_runs synth_1]
  720. set_property set_report_strategy_name 1 $obj
  721. set_property report_strategy {Vivado Synthesis Default Reports} $obj
  722. set_property set_report_strategy_name 0 $obj
  723. if { [ string equal [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0] "" ] } {
  724. create_report_config -report_name synth_1_synth_report_utilization_0 -report_type report_utilization:1.0 -steps synth_design -runs synth_1
  725. }
  726. set obj [get_report_configs -of_objects [get_runs synth_1] synth_1_synth_report_utilization_0]
  727. if { $obj != "" } {
  729. }
  730. set obj [get_runs synth_1]
  731. set_property -name "strategy" -value "Vivado Synthesis Defaults" -objects $obj
  732. current_run -synthesis [get_runs synth_1]
  733. if {[string equal [get_runs -quiet impl_1] ""]} {
  734. create_run -name impl_1 -part xc7z020clg400-1 -flow {Vivado Implementation 2020} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1
  735. } else {
  736. set_property strategy "Vivado Implementation Defaults" [get_runs impl_1]
  737. set_property flow "Vivado Implementation 2020" [get_runs impl_1]
  738. }
  739. set obj [get_runs impl_1]
  740. set_property set_report_strategy_name 1 $obj
  741. set_property report_strategy {Vivado Implementation Default Reports} $obj
  742. set_property set_report_strategy_name 0 $obj
  743. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0] "" ] } {
  744. create_report_config -report_name impl_1_init_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps init_design -runs impl_1
  745. }
  746. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_init_report_timing_summary_0]
  747. if { $obj != "" } {
  748. set_property -name "is_enabled" -value "0" -objects $obj
  749. set_property -name "options.max_paths" -value "10" -objects $obj
  751. }
  752. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0] "" ] } {
  753. create_report_config -report_name impl_1_opt_report_drc_0 -report_type report_drc:1.0 -steps opt_design -runs impl_1
  754. }
  755. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_drc_0]
  756. if { $obj != "" } {
  758. }
  759. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0] "" ] } {
  760. create_report_config -report_name impl_1_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps opt_design -runs impl_1
  761. }
  762. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_opt_report_timing_summary_0]
  763. if { $obj != "" } {
  764. set_property -name "is_enabled" -value "0" -objects $obj
  765. set_property -name "options.max_paths" -value "10" -objects $obj
  767. }
  768. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0] "" ] } {
  769. create_report_config -report_name impl_1_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps power_opt_design -runs impl_1
  770. }
  771. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_power_opt_report_timing_summary_0]
  772. if { $obj != "" } {
  773. set_property -name "is_enabled" -value "0" -objects $obj
  774. set_property -name "options.max_paths" -value "10" -objects $obj
  776. }
  777. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0] "" ] } {
  778. create_report_config -report_name impl_1_place_report_io_0 -report_type report_io:1.0 -steps place_design -runs impl_1
  779. }
  780. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_io_0]
  781. if { $obj != "" } {
  783. }
  784. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0] "" ] } {
  785. create_report_config -report_name impl_1_place_report_utilization_0 -report_type report_utilization:1.0 -steps place_design -runs impl_1
  786. }
  787. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_utilization_0]
  788. if { $obj != "" } {
  790. }
  791. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0] "" ] } {
  792. create_report_config -report_name impl_1_place_report_control_sets_0 -report_type report_control_sets:1.0 -steps place_design -runs impl_1
  793. }
  794. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_control_sets_0]
  795. if { $obj != "" } {
  796. set_property -name "options.verbose" -value "1" -objects $obj
  798. }
  799. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0] "" ] } {
  800. create_report_config -report_name impl_1_place_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1
  801. }
  802. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_0]
  803. if { $obj != "" } {
  804. set_property -name "is_enabled" -value "0" -objects $obj
  806. }
  807. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1] "" ] } {
  808. create_report_config -report_name impl_1_place_report_incremental_reuse_1 -report_type report_incremental_reuse:1.0 -steps place_design -runs impl_1
  809. }
  810. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_incremental_reuse_1]
  811. if { $obj != "" } {
  812. set_property -name "is_enabled" -value "0" -objects $obj
  814. }
  815. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0] "" ] } {
  816. create_report_config -report_name impl_1_place_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps place_design -runs impl_1
  817. }
  818. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_place_report_timing_summary_0]
  819. if { $obj != "" } {
  820. set_property -name "is_enabled" -value "0" -objects $obj
  821. set_property -name "options.max_paths" -value "10" -objects $obj
  823. }
  824. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0] "" ] } {
  825. create_report_config -report_name impl_1_post_place_power_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_place_power_opt_design -runs impl_1
  826. }
  827. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_place_power_opt_report_timing_summary_0]
  828. if { $obj != "" } {
  829. set_property -name "is_enabled" -value "0" -objects $obj
  830. set_property -name "options.max_paths" -value "10" -objects $obj
  832. }
  833. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0] "" ] } {
  834. create_report_config -report_name impl_1_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps phys_opt_design -runs impl_1
  835. }
  836. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_phys_opt_report_timing_summary_0]
  837. if { $obj != "" } {
  838. set_property -name "is_enabled" -value "0" -objects $obj
  839. set_property -name "options.max_paths" -value "10" -objects $obj
  841. }
  842. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0] "" ] } {
  843. create_report_config -report_name impl_1_route_report_drc_0 -report_type report_drc:1.0 -steps route_design -runs impl_1
  844. }
  845. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_drc_0]
  846. if { $obj != "" } {
  848. }
  849. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0] "" ] } {
  850. create_report_config -report_name impl_1_route_report_methodology_0 -report_type report_methodology:1.0 -steps route_design -runs impl_1
  851. }
  852. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_methodology_0]
  853. if { $obj != "" } {
  855. }
  856. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0] "" ] } {
  857. create_report_config -report_name impl_1_route_report_power_0 -report_type report_power:1.0 -steps route_design -runs impl_1
  858. }
  859. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_power_0]
  860. if { $obj != "" } {
  862. }
  863. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0] "" ] } {
  864. create_report_config -report_name impl_1_route_report_route_status_0 -report_type report_route_status:1.0 -steps route_design -runs impl_1
  865. }
  866. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_route_status_0]
  867. if { $obj != "" } {
  869. }
  870. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0] "" ] } {
  871. create_report_config -report_name impl_1_route_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps route_design -runs impl_1
  872. }
  873. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_timing_summary_0]
  874. if { $obj != "" } {
  875. set_property -name "options.max_paths" -value "10" -objects $obj
  877. }
  878. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0] "" ] } {
  879. create_report_config -report_name impl_1_route_report_incremental_reuse_0 -report_type report_incremental_reuse:1.0 -steps route_design -runs impl_1
  880. }
  881. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_incremental_reuse_0]
  882. if { $obj != "" } {
  884. }
  885. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0] "" ] } {
  886. create_report_config -report_name impl_1_route_report_clock_utilization_0 -report_type report_clock_utilization:1.0 -steps route_design -runs impl_1
  887. }
  888. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_clock_utilization_0]
  889. if { $obj != "" } {
  891. }
  892. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0] "" ] } {
  893. create_report_config -report_name impl_1_route_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps route_design -runs impl_1
  894. }
  895. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_route_report_bus_skew_0]
  896. if { $obj != "" } {
  897. set_property -name "options.warn_on_violation" -value "1" -objects $obj
  899. }
  900. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0] "" ] } {
  901. create_report_config -report_name impl_1_post_route_phys_opt_report_timing_summary_0 -report_type report_timing_summary:1.0 -steps post_route_phys_opt_design -runs impl_1
  902. }
  903. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_timing_summary_0]
  904. if { $obj != "" } {
  905. set_property -name "options.max_paths" -value "10" -objects $obj
  906. set_property -name "options.warn_on_violation" -value "1" -objects $obj
  908. }
  909. if { [ string equal [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0] "" ] } {
  910. create_report_config -report_name impl_1_post_route_phys_opt_report_bus_skew_0 -report_type report_bus_skew:1.1 -steps post_route_phys_opt_design -runs impl_1
  911. }
  912. set obj [get_report_configs -of_objects [get_runs impl_1] impl_1_post_route_phys_opt_report_bus_skew_0]
  913. if { $obj != "" } {
  914. set_property -name "options.warn_on_violation" -value "1" -objects $obj
  916. }
  917. set obj [get_runs impl_1]
  918. set_property -name "strategy" -value "Vivado Implementation Defaults" -objects $obj
  919. set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj
  920. set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj
  921. current_run -implementation [get_runs impl_1]
  922. puts "INFO: Project created:${_xil_proj_name_}"
    INFO: Project created:project_1
  923. if {[string equal [get_dashboard_gadgets [ list "drc_1" ] ] ""]} {
  924. create_dashboard_gadget -name {drc_1} -type drc
  925. }
  926. set obj [get_dashboard_gadgets [ list "drc_1" ] ]
  927. set_property -name "reports" -value "impl_1#impl_1_route_report_drc_0" -objects $obj
  928. if {[string equal [get_dashboard_gadgets [ list "methodology_1" ] ] ""]} {
  929. create_dashboard_gadget -name {methodology_1} -type methodology
  930. }
  931. set obj [get_dashboard_gadgets [ list "methodology_1" ] ]
  932. set_property -name "reports" -value "impl_1#impl_1_route_report_methodology_0" -objects $obj
  933. if {[string equal [get_dashboard_gadgets [ list "power_1" ] ] ""]} {
  934. create_dashboard_gadget -name {power_1} -type power
  935. }
  936. set obj [get_dashboard_gadgets [ list "power_1" ] ]
  937. set_property -name "reports" -value "impl_1#impl_1_route_report_power_0" -objects $obj
  938. if {[string equal [get_dashboard_gadgets [ list "timing_1" ] ] ""]} {
  939. create_dashboard_gadget -name {timing_1} -type timing
  940. }
  941. set obj [get_dashboard_gadgets [ list "timing_1" ] ]
  942. set_property -name "reports" -value "impl_1#impl_1_route_report_timing_summary_0" -objects $obj
  943. if {[string equal [get_dashboard_gadgets [ list "utilization_1" ] ] ""]} {
  944. create_dashboard_gadget -name {utilization_1} -type utilization
  945. }
  946. set obj [get_dashboard_gadgets [ list "utilization_1" ] ]
  947. set_property -name "reports" -value "synth_1#synth_1_synth_report_utilization_0" -objects $obj
  948. set_property -name "run.step" -value "synth_design" -objects $obj
  949. set_property -name "run.type" -value "synthesis" -objects $obj
  950. if {[string equal [get_dashboard_gadgets [ list "utilization_2" ] ] ""]} {
  951. create_dashboard_gadget -name {utilization_2} -type utilization
  952. }
  953. set obj [get_dashboard_gadgets [ list "utilization_2" ] ]
  954. set_property -name "reports" -value "impl_1#impl_1_place_report_utilization_0" -objects $obj
  955. move_dashboard_gadget -name {utilization_1} -row 0 -col 0
  956. move_dashboard_gadget -name {power_1} -row 1 -col 0
  957. move_dashboard_gadget -name {drc_1} -row 2 -col 0
  958. move_dashboard_gadget -name {timing_1} -row 0 -col 1
  959. move_dashboard_gadget -name {utilization_2} -row 1 -col 1
  960. move_dashboard_gadget -name {methodology_1} -row 2 -col 1
    update_compile_order -fileset sources_1

Replies (1)

RE: Cannot build hardware for sd_demo - Added by Shawn Sebastian Pulle (ฌอน) almost 2 years ago

Hi Johan,

Thank you for the feedback.
The tcl file will be updated in the next release.

    (1-1/1)